Merge pull request #4 from deffel/master

Fixed regex for Xilinx nodes with three FPGAs.
pc2 · Nov 22, 2022 · 0b22f7a · 0b22f7a
2 parents fca2c70 + a4401d7
commit 0b22f7a
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/gui/Toolbar.js b/gui/Toolbar.js
@@ -212,7 +212,7 @@ example.Toolbar = Class.extend({
 
 			// Pre-process command for "n2fpga.." node id to replace
 			// with "n00.." node names.
-			var regFPGA = /(n2fpga\d{2}):(acl[01]{1}):(ch[0123]{1})-(n2fpga\d{2}):(acl[01]{1}):(ch[0123]{1})/g;
+			var regFPGA = /(n2fpga\d{2}):(acl[012]{1}):(ch[0123]{1})-(n2fpga\d{2}):(acl[012]{1}):(ch[0123]{1})/g;
 			var resultFPGA;
 			const mapFPGA = new Map();
 
@@ -241,7 +241,7 @@ example.Toolbar = Class.extend({
 
 			// salloc: SPANK_FPGALINK0=n00:acl0:ch3-n00:acl1:ch3 salloc: SPANK_FPGALINK1=n00:acl0:ch2-n00:acl1:ch2 salloc: SPANK_FPGALINK2=n00:acl0:ch0-n00:acl1:ch0 salloc: SPANK_FPGALINK3=n00:acl0:ch1-n00:acl1:ch1
 
-			var reg = /(n[01]{1}\d{1}):(acl[01]{1}):(ch[0123]{1})-(n[01]{1}\d{1}):(acl[01]{1}):(ch[0123]{1})/g;
+			var reg = /(n[01]{1}\d{1}):(acl[012]{1}):(ch[0123]{1})-(n[01]{1}\d{1}):(acl[012]{1}):(ch[0123]{1})/g;
 			var result;
 			const mapN = new Map();