diff --git a/config/_default/hugo.toml b/config/_default/hugo.toml index a9c54d3..e299385 100644 --- a/config/_default/hugo.toml +++ b/config/_default/hugo.toml @@ -30,6 +30,16 @@ DefaultContentLanguageInSubdir = true languageName = 'English' title = 'PLCT Lab' weight = 2 + [languages.en.menus] + [[languages.en.menus.main]] + name = "PLCT-Weekly" + url = "/en/posts/plct-weekly/" + weight = 5 + [[languages.en.menus.main]] + identifier = "News" + name = "News" + url = "/en/news/" + weight = 4 [languages.zh] contentDir = 'content/zh' disabled = false @@ -40,6 +50,16 @@ DefaultContentLanguageInSubdir = true weight = 1 hasCJKLanguage = true summaryLength = 230 + [languages.zh.menus] + [[languages.zh.menus.main]] + name = "PLCT-Weekly" + url = "/en/posts/plct-weekly/" + weight = 5 + [[languages.zh.menus.main]] + identifier = "News" + name = "新闻" + url = "/zh/news/" + weight = 4 [languages.ru] contentDir = 'content/ru' disabled = false @@ -48,6 +68,16 @@ DefaultContentLanguageInSubdir = true languageName = 'Русский' title = 'PLCT Lab' weight = 3 + [languages.ru.menus] + [[languages.ru.menus.main]] + name = "PLCT-Weekly" + url = "/en/posts/plct-weekly/" + weight = 5 + [[languages.ru.menus.main]] + identifier = "News" + name = "Новости" + url = "/ru/news/" + weight = 4 [languages.ja] contentDir = 'content/ja' disabled = false @@ -58,6 +88,16 @@ DefaultContentLanguageInSubdir = true weight = 4 hasCJKLanguage = true summaryLength = 230 + [languages.ja.menus] + [[languages.ja.menus.main]] + name = "PLCT-Weekly" + url = "/en/posts/plct-weekly/" + weight = 5 + [[languages.ja.menus.main]] + identifier = "News" + name = "消息" + url = "/ja/news/" + weight = 4 [languages.ko] contentDir = 'content/ko' disabled = false @@ -68,7 +108,16 @@ DefaultContentLanguageInSubdir = true weight = 5 hasCJKLanguage = true summaryLength = 230 - + [languages.ko.menus] + [[languages.ko.menus.main]] + name = "PLCT-Weekly" + url = "/en/posts/plct-weekly/" + weight = 5 + [[languages.ko.menus.main]] + identifier = "News" + name = "소식" + url = "/ko/news/" + weight = 4 #disableAliases = true # Set to true if using server (Netlify, .htaccess) for redirects instead of Hugo disableKinds = [] # Default enableEmoji = true # Use Emojis in content diff --git a/config/_default/menus.toml b/config/_default/menus.toml index 28a59a9..df06145 100644 --- a/config/_default/menus.toml +++ b/config/_default/menus.toml @@ -1,83 +1,14 @@ -# [[main]] -# # Top-level menu entry -# identifier = "projects" -# name = "Projects" -# url = "/projects/" -# weight = 1 - -# [[main]] -# identifier = "projects" -# name = "Projects" -# url = "/projects/" -# parent = "work" -# weight = 1 - -# [[main]] -# identifier = "about" -# name = "About" -# url = "/about/" -# parent = "work" -# weight = 2 - -# [[main]] -# identifier = "contact" -# name = "Contact" -# url = "/contact/" -# parent = "work" -# weight = 3 - -[[main]] - # Top-level menu entry - identifier = "writing" - name = "PLCT-Weekly" - url = "/en/posts/plct-weekly/" - weight = 4 -[[main]] - identifier = "News" - name = "News" - url = "/en/news/" - weight = 4 - -# [[main]] -# identifier = "subsection" -# name = "Subsection" -# url = "/subsection/" -# # url = "/posts/subsection/" # Remove url param from subsection/_index.md frontmatter to use full permalink -# parent = "writing" -# weight = 5 # [[main]] # # Top-level menu entry -# identifier = "explore" -# name = "Explore" -# url = "/categories/" -# weight = 6 - -# [[main]] -# identifier = "categories" -# name = "Categories" -# url = "/categories/" -# parent = "explore" -# weight = 6 - -# [[main]] -# identifier = "tags" -# name = "Tags" -# url = "/tags/" -# parent = "explore" -# weight = 7 - -# [[main]] -# identifier = "series" -# name = "Series" -# url = "/series/" -# parent = "explore" -# weight = 8 +# identifier = "writing" +# name = "PLCT-Weekly" +# url = "/en/posts/plct-weekly/" +# weight = 4 # [[main]] -# identifier = "project-type" -# name = "Project Types" -# url = "/project-types/" -# parent = "explore" -# weight = 9 +# identifier = "News" +# name = "News" +# url = "/zh/news/" +# weight = 4 diff --git a/content/ja/news/00-RISC-V-spoc.md b/content/ja/news/00-RISC-V-spoc.md new file mode 100644 index 0000000..829e200 --- /dev/null +++ b/content/ja/news/00-RISC-V-spoc.md @@ -0,0 +1,146 @@ ++++ +title = 'Preparation for the Inaugural “RISC-V Software Porting and Optimization Championship” Officially Launched' +date = 2023-10-28T00:28:09+08:00 +toc = true +slug = '00' +summary = 'To date, billions of RISC-V devices has already been deployed in the MCU/IoT realms and is poised to challenge established players in the desktop computing, HPC, AI, and database markets. Compared to the embedded and IoT software ecosystem, the world of desktops and servers boast a vast software ecosystem demands considerable porting and optimization efforts.' ++++ + +## Event Name + +RISC-V Software Porting and Optimization Championship + +RISC-V 软件移植及优化锦标赛 + +Чемпионат по портированию и оптимизации программного обеспечения RISC-V + +RISC-V ソフトウェアの移植と最適化チャンピオンシップ + +RISC-V 소프트웨어 포팅 및 최적화 챔피언십 + +## Rationale + +To date, billions of RISC-V devices has already been deployed in the MCU/IoT realms and is poised to challenge established players in the desktop computing, HPC, AI, and database markets. Compared to the embedded and IoT software ecosystem, the world of desktops and servers boast a vast software ecosystem demands considerable porting and optimization efforts. + +In the past few years, the PLCT Lab dedicated a great amount of financial and human resources along with research and development groups around the globe in an effort to enhance RISC-V’s software ecosystem. Today, almost all mainstream Linux distributions are already providing or are actively working to support the RISC-V architectures. Toolchains and runtimes such as GNU, Clang/LLVM, OpenJDK, V8 and SpiderMonkey are now working reliably on RISC-V. + +The fact that open sources software are not as optimized for RISC-V hardware platforms as their x86 and ARM64 counterpart points to the need for more developer input. To help attract developers to the RISC-V ecosystem and to accelerate the advancement of its software ecosystem, the PLCT Lab launched the “RISC-V Software Porting and Optimization Championship.” This championship sets its focus on desktop and server software ecosystems, designing competitive categories for compilers, runtime environments, AI software stacks, etc. and is open to participation by developers around the globe. + +## Championship Organizers + +Host: The PLCT Lab (associated with the Intelligent Software Research Center of the Institute of Software, Chinese Academy of Sciences) + +Event Host: Hangzhou Quancheng Intelligent Software Co., Ltd. + +Co-host: RISC-V China Community (CNRV) + +Note: Organizers are subject to change. Please follow our latest updates on CNRV’s WeChat Official Account. + +## Competitive Categories + +The championship will consist of **porting capture-the-flag** and **optimization sprint** events. + +The **porting capture-the-flag** event sets a particular software for porting to the RISC-V architecture. In essence, the first team or individual to complete and submit the port wins. The host opens a repository for participant submissions, the first to submit their changes and pass the tests will be made the winner. The code submitted during the event will be copyrighted or attributed to the participating individuals or the open source communities that receive the port. We encourage the participants to contribute their code to the upstream projects. + +The **optimization sprint** sets a series of **evaluation criteria**, against which the team or individual’s optimization work will be benchmarked. The teams and individuals will optimize a specified project within a set interval and the best benchmarked project wins. + +Based on the number of participants, the championship will run both individual and team events. For individual events, the participant will complete their work individually and wholly receive any prizes awarded. Events with two or more participants will be listed under the team events category. The team events set no limit on the number of participants and the teams will decide on their own terms regarding how to split the prizes awarded. + +## Championship Schedule + +October 31, 2023: Deadline for Sponsorship Registration + +November 1, 2023 – November 30, 2023: Event Launch an Announcement of Projects + +December 1, 2023 – February 16, 2024: Registration and Competitive Events + +February 17, 2024 – March 1, 2024: Host Assessment of Submissions and Announcement of Winners + +Early April, 2024: Awards Ceremony and RISC-V Technical Seminar + +## Call for Sponsors + +This championship is open to manufacturer sponsorship. We welcome donations from RISC-V manufacturers and look forward to collaborations. + +### Sponsorship Contributions and Perks + +The sponsors may participate in project and prize designs. The sponsors will also be advertised during the events. +Sponsorships start at CNY 200,000 and cap at CNY 1,000,000 (subject to change). Sponsors may negotiate and customize their contribution based on the number of projects and amount of prizes proposed. + +Sponsorships will be utilized as follows: + +- 30% of the amount donated will be used for event organization, as well as costs incurred for staffing, organization, and promotion. + +- 70% of the amount donated will be used as prizes. + +Sponsor perks are as follows: + +- Specifying hardware devices or platforms as porting and optimization targets. + +- Designing competitive projects and rights to derive project designs (more detailed rules to follow). + +- Designing prize distribution schemes and assessing submissions with the host. + +- Attending the awards ceremony and the RISC-V technical seminar, with a 20 minute keynote segment, as well as promotions and hiring, stands, and invitation to the contributors’ dinner. + +- Participating in other host promotional activities, including both in-person and live online events. + +Those who are interested in becoming a sponsor, please get in touch with us: + +- **To: “Wei Wu”** wuwei2016@iscas.ac.cn + +- **Subject: “[RVPOC] Sponsor + your_company_name”** + +## Template: Project Design + +We are currently calling for competitive project designs. Anyone from the various communities for the RISC-V ecosystem are welcome to contribute project designs. Designs may be in the form of a wish list or a software port or optimization. + +Those who are interested in submitting a project design, please submit them here: + +- **To:“Wei Wu”** wuwei2016@iscas.ac.cn + +- **Subject:“[RVPOC] WISHLIST + the software you want to run on rv”** + +### Event Class: Porting Capture-the-Flag + +Winning participants must open source their submissions and contribute their changes to the upstream project. + +| Type | Project | Reference Prizes(in CNY) | Assessment Platform | Sponsor | +| -------- | ----------------------------------- | ------------------- | ----------- | -------- | +| Runtime | Mono on RISC-V | 50,000 | SG2042 QEMU | TBA | +| Runtime | RISC-V V-extension port WASM SIMD REVEC in V8 | 100,000 | SG2042 QEMU | TBA | +| Runtime | Contributions and ideas welcome! | | | | + +### Event Class: Optimization Sprint + +Both open-source and closed source tracks will be hosted. Participants must take part in the open-source track to receive prizes. + +| Type | Project | Reference Prizes(in CNY)| Assessment Platform | Sponsor | +| ------ | ---------- | -------------------- | -------- | -------- | +| JavaScript Engine | Firefox Kraken benchmark optimization | 5,000 | LicheePi 4A SG2042 | TBD | +| JavaScript Engine | V8 bit-ops optimization using the RISC-V B-extensions | 30,000 | Unmatched SG2042 TH1520 | TBD | +| Games | OpenRA optimization on SG2042 platforms (in frames-per-second) | 100,000 | SG2042 SG2044 | TBD | +| rvv0p7 | Translation tool or system forrunning RVV1.0-optimized applications on RVV0.7 hardware that offers maximal performance | 200,000 | | TBD | +| rvv0p7 | Contributions and ideas welcome!| | | | + +## Organization of the Accreditation Committees + +The host (the PLCT Lab) will assemble an Accreditation Committee for each competitive project with open rosters, consisting of industry-renowned developers, sponsorship representatives, vendor representatives, as well as volunteers. The Accreditation Committees will reproduce and assess the submitted results. + +## Championship Awards Ceremony and RISC-V Technical Seminar + +Date: Early April, 2024. +Location: Hangzhou (venue pending, sponsorships welcome). +Format: In-person full-day seminar. +Agenda: To be announced March, 2024. + +## Note to Participants (Updates Forthcoming) + +1.This championship accepts both individual and team participants, with no limit on the number of registered participants. + +2.The competitions will run both open-source and closed source (commercial) tracks. Only participants of the open-source track are eligible for receiving prizes. Those who participate in the closed source (commercial) track will only be recorded in event ranking. + +3.We welcome participants from all countries and regions. Participants from mainland China needs to provide details on their domestic bank cards to receive prizes; +non-mainland China participants must submit their passport or boarder pass information, as well as their bank account details (banks must be SWIFT or CIPS members). + +4.More detailed notes forthcoming. diff --git a/content/ja/news/001.md b/content/ja/news/001.md new file mode 100644 index 0000000..0197875 --- /dev/null +++ b/content/ja/news/001.md @@ -0,0 +1,38 @@ ++++ +title = '快讯｜RuyiSDK 现已支持 Canaan K230 芯片, RevyOS 小队完成 RevyOS 的初步适配' +date = 2024-02-29 ++++ + +![pic1.jpg](/news-images/pic1.jpg) + + + +**项目地址**: + +- GitHub - revyos/k230-linux-kernel: K230 linux kernel + https://github.com/revyos/k230-linux-kernel/tree/k230-v6.8 +- RuyiSDK/RevyOS + https://github.com/ruyisdk/revyos + +中国科学院软件研究所 RuyiSDK 团队成功支持了 Canaan K230 芯片，这一成就离不开开源社区的好心人 **Cyyself（Yangyu Chen）** 同学的卓越贡献。Cyyself 是 PLCT-CAAT 小队实习生，他在移植 K230 新内核方面付出了巨大的努力，为 RevyOS 的发展做出了重要贡献。 + +**RevyOS** 是一款专为 **T-Head** 芯片生态定制的 **Debian** 优化发行版。它围绕着 **c906fdv/c910v/c908** 等芯片提供了全面的适配和优化支持。默认集成了 **RVV0.7.1** 和 **XThead** 的 **GCC** 工具链，搭载了使用 **RVV0.7.1** 指令集优化过的 **glibc** 和 **kernel** 。目前，**RevyOS** 已经能够满足用户在办公、网页浏览和观看视频等方面的基本需求。在硬件平台上，例如 **Lichee RV** 和 **Lichee Pi 4A** ，**RevyOS** 能够提供优秀的性能和极佳的体验。 + +如果您想获取 **RevyOS** 的最新版镜像，请访问**中国科学院软件研究所**的开源镜像站（佳毅小队维护，有问题可以直接找他）。您可以根据所使用的设备获取对应的镜像。此外，**RevyOS** 还在稳定发布 **Lichee Pi 4A** 用户版镜像的同时，适用于 **LicheePi Cluster 4A** 的主线内核版本镜像也已发布。 + +**RevyOS**的用户版镜像包含 **U-boot** 、**boot** 和 **root** 文件。刷写方式请参考镜像刷写教程。 + +**Canaan K230**是一款内置双核玄铁C908 **RISC-V**芯片, 主频高达 **1.6GHz**，并配备第三代 **KPU** 处理单元的开发板，提供强劲的本地 **AI** 推理能力。它是专业开发人员搭建原型设计、评估性能的理想选择。 + +Links: + +- 镜像刷写教程 + https://wiki.sipeed.com/hardware/zh/lichee/th1520/lpi4a/4burnimage.html#%E6%89%B9%E9%87%8F%E7%83%A7%E5%BD%95)。 +- K230 + https://www.canaan-creative.com/product/k230 +- revyos/k230-linux-kernel: K230 linux kernel + https://github.com/revyos/k230-linux-kernel/tree/k230-v6.8 +- RuyiSDK/RevyOS + https://github.com/ruyisdk/revyos + +![pic2.jpg](/news-images/pic2.jpg) \ No newline at end of file diff --git a/content/ja/news/002.md b/content/ja/news/002.md new file mode 100644 index 0000000..e683bc5 --- /dev/null +++ b/content/ja/news/002.md @@ -0,0 +1,86 @@ ++++ +title = '玄铁团队与PLCT实验室联合发布：新32位产品级开源工具链及Linux内核' +date = 2024-03-11 ++++ + +> AIoT技术的快速发展不断推高了对微控制器（MCU）和应用处理器（AP）计算能力的需求，这使得传统32位架构的性能局限性日益明显。在此架构中，内存访问和原子操作指令不再能有效满足现代操作系统的性能要求和精巧设计，从而推动了向64位硬件架构的转变。在这种转变中，32位软件在64位架构上运行时存在指针宽度与硬件寄存器宽度不匹配的问题。在过去的 64ILP32 ABI 实践中是通过编译器添加零扩展指令来解决这一不匹配问题，但这降低了性能。为克服该性能问题，**达摩院-玄铁团队提出了松弛扩展寻址模式（Relaxed-Addressing Mode），并与中科院软件所-PLCT实验室联合发布了业界首款RISC-V新32位产品级开源工具链（rv64ilp32 toolchain）和 Linux 内核**。在对比测试中新32位 Linux 内核展现了诸多优势：相比传统32位，大幅提升内核的综合性能；相比传统64位，Fedora 团队在K230芯片上利用新32位内核节省内存，降低成本。此举旨在充分利用64位硬件的计算优势，从而显著提升了新32位嵌入式系统的综合性能，标志着嵌入式处理器从32位向64位转型的关键进展。 + +## 松弛扩展寻址 + +历史上，64ILP32 ABI的实施面临着的主要障碍是：32位指针与64位寄存器之间的不匹配问题，这不仅引起性能损失，还增加了编译器的复杂性。虽然零扩展寻址（Zero-extend Addressing）在 x86-x32 和 aarch64-ilp32 ABI 中得到采用，但额外的零扩展指令降低了程序效率。与之相比，32ILP32 和 64LP64 ABI 因指针长度与寄存器宽度一致，避免了这种性能开销。面对这些挑战，我们首先考虑了符号扩展寻址（Sign-extend Addressing），它在一定程度上减缓了零扩展的性能问题，但增加了编译器和内核实现的复杂度。于是，我们提出了松弛扩展寻址（Relax-extend Addressing）方案，它通过硬件的指针掩码功能，允许在执行32位寻址操作时忽略64位寄存器的高32位，大幅简化了编译器工作，降低指令数量，并保持了安全性与可靠性。我们对以上三种寻址模式总结如下： + +● 抹零扩展寻址：传统方法，需要编译器生成额外的的指令来清零高32位，导致性能损失。 + +● 符号扩展寻址：改良方案，通过操作系统页表的双重映射，合法化32位符号位扩展，缓解零扩展的性能开销。 + +● 松弛扩展寻址：创新方案，依赖处理器硬件掩码来实现高效寻址，彻底消除了寻址时的性能损失。 + +因此，松弛扩展被我们选定为 RV64ILP32 ABI 的默认寻址模式，它要求 RISC-V 64位处理器支持寻址掩码功能，对硬件设计提出了新的要求。我们在 QEMU 上实验该功能，并证明了基于松弛扩展寻址模式的 RV64ILP32 工具链的有效性。 + +## 新32位内核 + +新32位工具链基于 RISC-V 64ilp32 ABI，融合了松弛扩展寻址技术，让64位硬件流畅运行新32位软件。我们在 qemu 上实现了硬件松弛扩展寻址模式，并用新工具链构建了**业内首款新32位Linux内核**。 + +与传统32位对比，尽管新32位和传统32位都是32位Linux操作系统软件，但新32位得益于64位指令集，其性能显著优于传统32位： + +![pic3.jpg](/news-images/pic3.jpg) + +如上图所示，新32位内核的 iperf3-tcp 测试大幅领先，在软件 ABI 相同的情况下，使用 64 位指令架构能极大提升操作系统的性能。本次qemu 测试仅供参考，请联系硬件供应商获得真实的性能差距报告，本测试用例已在工具链发布包内，请大家直接下载自行体验，动画测试的全过程见下方链接： + +https://mp.weixin.qq.com/s/argIGP4_rUKDm9IRIB-YTg + +与传统64位对比，Fedora 团队完成了 RISC-V 新32位在 k230 硬件平台的适配，新32位避免了39%的内存浪费，其成本优势使 Fedora RISC-V 能在嵌入式领域有更广泛的应用，具体请参考： + +https://fedoraproject.org/wiki/Architectures/RISC-V/64ILP32 + + + +![pic4.jpg](/news-images/pic4.jpg) + + + +![pic5.jpg](/news-images/pic5.jpg) + +## 新32位工具链 + +让32位软件运行在64位硬件上不仅更快而且更省，这正是我们新32位编译器的优势所在，不禁让人想起中国古代田忌赛马的故事，与传统32位比性能，与传统64位比成本。换言之，新32位就是要取代传统32位，与64位形成互补。在进一步的测试中，我们观察到了传统32位的明显不足： + +![pic6.jpg](/news-images/pic6.jpg) + +如上图所示，在处理长数据类型时，传统32位的编译器生成了超过10条额外指令来操作保存的变量。相反，当采用新32位工具链时，编译器会直接利用64位指令来处理这些数据，大幅度减少了所需指令的数量。 + + + +![pic7.jpg](/news-images/pic7.jpg) + +**本次发布的新32位工具链通过了33万个测试用例，其中包含 192133 个 g++ 用例, 与 143498 个 gcc 用例 ，全面覆盖编译器的各项功能，测试结果与 GCC13 release 保持一致，达到产品级质量要求。相比传统32位，它的优势如下：** + +● **更强大的性能：** 新32位编译器在处理长数据类型时更加高效，因为它无需进行额外的寄存器拼接或零扩展操作。这可以显著减少指令数量，提高程序的执行效率，特别是在涉及大量长数据类型操作的情况下。 + +● **更好的兼容性：** 新32位编译器可以与传统64位编译器兼容，因为它们基于相同的硬件指令集。这意味着开发者可以更轻松地将现有的64位汇编代码迁移到新32位平台上，而无需做出太多修改。 + +● **更多的扩展性：** 随着技术的发展和需求的增长，对更大的内存空间和更高性能的需求也在不断增加。新32位的硬件平台可以为未来的扩展性提供了更好的支持，因为它能无缝切换到传统64位以满足更高要求的应用程序。 + +● **产品级的质量：**新32位工具链经过大量测试验证，保证使用的正确性与稳定性，同时在RUYISDK开源仓库中进行维护更新，及时解决用户遇到的各种问题。 + + + +快速上手：https://github.com/ruyisdk/riscv-gnu-toolchain-rv64ilp32/ + +技术支持：https://github.com/ruyisdk/riscv-gnu-toolchain-rv64ilp32/issues/ + + + +## 结束语 + +松弛扩展寻址技术在新**32**位工具链中扮演着关键角色，为嵌入式系统的开发和部署提供了全新的解决方案。作为**业内首款基于松弛扩展寻址技术的新32位产品级开源工具链和Linux内核**，标志着嵌入式系统开发领域的一次重要创新。我们热切期待开发者们积极参与到新32位的开发和完善中，共同提出宝贵的建议和意见，推动新32位不断发展。我们致力于建立一个健康和活跃的开源社区，将持续投入资源和精力，确保新32位的稳定性和可靠性，并不断改进和完善其功能和性能。在此，我们也呼吁更多的硬件厂商加入我们的阵营，共同推动新32位嵌入式系统的发展和创新，为行业带来更多的可能性和机遇。 + +### 相关阅读 + +● [rv64ilp32: The future of the 32-bit Linux](https://mp.weixin.qq.com/s/XTX_jUYzirDQVXaHHR8i1Q) + +### 关于我们 + +●**PLCT GNU**小队是专注**GNU**工具链开发的团队，目前致力于维护**GNU RISC-V**后端支持工作，包括草案支持及性能优化。作为开源社区的积极贡献者，我们矢志不渝地推动**RISC-V**架构在**GNU**工具链中的广泛应用与性能提升，欢迎交流合作。 + +● 达摩院玄铁团队持续深耕**RISC-V**技术研发及生态建设，并陆续推出了一系列玄铁处理器，可满足高中低全系列性能需求。玄铁积极拥抱开源，坚持开放创新，已逐渐构建起以**RISC-V**为核心的生态体系，与生态伙伴协同推动**RISC-V**芯片、开发工具、操作系统、应用解决方案等不同层面的软硬一体化发展。全力推动**RISC-V**软硬全栈技术多领域发展落地，加速实现智能时代的万物互联! \ No newline at end of file diff --git a/content/ja/news/003.md b/content/ja/news/003.md new file mode 100644 index 0000000..499a4d8 --- /dev/null +++ b/content/ja/news/003.md @@ -0,0 +1,39 @@ ++++ +title = '喜讯｜祝贺陈逸轩完成RISC-V国际基金会 RISC-V Advocate 首批认证：全球共4位、唯一女性代表、唯一东亚代表' +date = 2024-03-17 ++++ + +围观地址：https://riscv.org/risc-v-advocates/ + +![pic8.jpg](/news-images/pic8.jpg) + +我们怀着非常激动的心情与所有PLCT实验室的伙伴和支持者分享一个好消息：来自中国科学院软件研究所**PLCT**实验室**GNU工具链小队**的编译器工程师**陈逸轩**同学，经过了10个月的训练和等待，终于通过了RISC-V国际基金会认证，成为首批4名公布的 **RISC-V Advocate（RISC-V倡导者）**，她是目前全球唯一获得认证的女性工程师，也是唯一的东亚面孔。 + +陈逸轩工程师同时兼任**PLCT**实验室武汉办公室主任、并且在（由邱吉博士发起的面向女性编译器工程师职业提升的）**南盘江计划**中担任活跃组织者。她在职业生涯伊始就参与了开源软件社区的贡献，并于**2022**年初加入**PLCT**实验室，成为一名为**RISC-V**开源软件生态的开拓者。 + +目前陈逸轩工程师所在的GNU工具链小队正在招募GCC编译器开发实习生，欢迎在GitHub 上搜索 **plctlab/weloveinterns** 获取最新全面的PLCT实验室招聘信息。 + +**让荣光落于刀锋之上！** + +![pic9.jpg](/news-images/pic9.jpg) + +以下是RISC-V倡导者的介绍（来自于 https://riscv.org/risc-v-advocates/ 内容为机器翻译，请忽略错误） + +RISC-V 倡导者通过全球推广和参与来支持 RISC-V 的进步。 + +倡导者是 RISC-V 爱好者，他们与 RISC-V International 合作，确保全球势头和采用。 成功的倡导者包括工程专业的学生和早期采用者，他们热衷于与社区分享他们对 RISC-V 的知识和热爱。 + +该计划将于 2024 年正式启动，需要每年提交申请，并详细了解您如何获得资格。 2024 年计划的申请现已开放，将于 2024 年 2 月 29 日截止。被接受加入该计划的个人将于 2024 年 3 月 15 日收到通知。该计划按日历年运行。 + +RISC-V 倡导者是对 RISC-V 充满热情并致力于发展和参与 RISC-V 社区的个人。 RISC-V 倡导者计划为社区成员提供工具和资源，以： + +- 扩大他们在 RISC-V 工作中的作用 +- 对当地社区进行 RISC-V 使命和技术方面的教育 +- 吸引 RISC-V 成员参与和社区发展 +- 倡导者的特质：热衷于分享他们对 RISC-V 的知识和热爱。 能够让其他人参与当地社区并通过直接贡献支持生态系统。 + +RISC-V Advocates support RISC-V progress through global promotion and engagement. See requirements to apply below, please **apply here by February, 29 2024**. + +**RISC-V Advocates are individuals passionate about RISC-V and dedicated to growing and engaging the RISC-V community.** + +Questions? Reach out to local (at) riscv (dot) org \ No newline at end of file diff --git a/content/ja/news/004.md b/content/ja/news/004.md new file mode 100644 index 0000000..392d18b --- /dev/null +++ b/content/ja/news/004.md @@ -0,0 +1,32 @@ ++++ +title = '内测邀请：RuyiSDK官方网站即将正式上线' +date = 2024-03-18 ++++ + + +![pic10.jpg](/news-images/pic10.jpg) + +我们很高兴地宣布，RuyiSDK的全新官方网站即将上线！这是我们的一个重要里程碑，我们诚邀您成为我们测试的一部分。 + +RuyiSDK一直致力于提供最前沿的RISC-V软件开发工具和服务，我们的新网站将进一步提升您的用户体验。在正式发布之前，我们希望通过您的参与来完善网站功能，确保一切运行顺畅。**测试参与者可以：** + +- 提前体验网站的最新功能 +- 对网站的未来发展提出建议和反馈 + +**测试时间：** 2024年3月15日至4月1日 + +**如何参与：** 请访问我们的测试页面 ruyisdk.org 开始体验。您的每一条反馈都是对我们至关重要的支持。我们期待着您的宝贵意见，一起打造更好的RuyiSDK。 + + + +**联系方式：** 如有任何疑问，请通过以下方式联系我们： + +- 微信公众号：ruyisdk + +- Github Issues: https://github.com/ruyisdk/ruyisdk-website/issues + +- Github Discussions: https://github.com/ruyisdk/ruyisdk-website/discussions + + + + 感谢您的支持！RuyiSDK团队 \ No newline at end of file diff --git a/content/ja/news/_index.md b/content/ja/news/_index.md new file mode 100644 index 0000000..77c28ba --- /dev/null +++ b/content/ja/news/_index.md @@ -0,0 +1,5 @@ +--- +title: News +summary: This is our recently news. +description: Explore some of recent posts. +--- \ No newline at end of file diff --git a/content/ko/news/00-RISC-V-spoc.md b/content/ko/news/00-RISC-V-spoc.md new file mode 100644 index 0000000..829e200 --- /dev/null +++ b/content/ko/news/00-RISC-V-spoc.md @@ -0,0 +1,146 @@ ++++ +title = 'Preparation for the Inaugural “RISC-V Software Porting and Optimization Championship” Officially Launched' +date = 2023-10-28T00:28:09+08:00 +toc = true +slug = '00' +summary = 'To date, billions of RISC-V devices has already been deployed in the MCU/IoT realms and is poised to challenge established players in the desktop computing, HPC, AI, and database markets. Compared to the embedded and IoT software ecosystem, the world of desktops and servers boast a vast software ecosystem demands considerable porting and optimization efforts.' ++++ + +## Event Name + +RISC-V Software Porting and Optimization Championship + +RISC-V 软件移植及优化锦标赛 + +Чемпионат по портированию и оптимизации программного обеспечения RISC-V + +RISC-V ソフトウェアの移植と最適化チャンピオンシップ + +RISC-V 소프트웨어 포팅 및 최적화 챔피언십 + +## Rationale + +To date, billions of RISC-V devices has already been deployed in the MCU/IoT realms and is poised to challenge established players in the desktop computing, HPC, AI, and database markets. Compared to the embedded and IoT software ecosystem, the world of desktops and servers boast a vast software ecosystem demands considerable porting and optimization efforts. + +In the past few years, the PLCT Lab dedicated a great amount of financial and human resources along with research and development groups around the globe in an effort to enhance RISC-V’s software ecosystem. Today, almost all mainstream Linux distributions are already providing or are actively working to support the RISC-V architectures. Toolchains and runtimes such as GNU, Clang/LLVM, OpenJDK, V8 and SpiderMonkey are now working reliably on RISC-V. + +The fact that open sources software are not as optimized for RISC-V hardware platforms as their x86 and ARM64 counterpart points to the need for more developer input. To help attract developers to the RISC-V ecosystem and to accelerate the advancement of its software ecosystem, the PLCT Lab launched the “RISC-V Software Porting and Optimization Championship.” This championship sets its focus on desktop and server software ecosystems, designing competitive categories for compilers, runtime environments, AI software stacks, etc. and is open to participation by developers around the globe. + +## Championship Organizers + +Host: The PLCT Lab (associated with the Intelligent Software Research Center of the Institute of Software, Chinese Academy of Sciences) + +Event Host: Hangzhou Quancheng Intelligent Software Co., Ltd. + +Co-host: RISC-V China Community (CNRV) + +Note: Organizers are subject to change. Please follow our latest updates on CNRV’s WeChat Official Account. + +## Competitive Categories + +The championship will consist of **porting capture-the-flag** and **optimization sprint** events. + +The **porting capture-the-flag** event sets a particular software for porting to the RISC-V architecture. In essence, the first team or individual to complete and submit the port wins. The host opens a repository for participant submissions, the first to submit their changes and pass the tests will be made the winner. The code submitted during the event will be copyrighted or attributed to the participating individuals or the open source communities that receive the port. We encourage the participants to contribute their code to the upstream projects. + +The **optimization sprint** sets a series of **evaluation criteria**, against which the team or individual’s optimization work will be benchmarked. The teams and individuals will optimize a specified project within a set interval and the best benchmarked project wins. + +Based on the number of participants, the championship will run both individual and team events. For individual events, the participant will complete their work individually and wholly receive any prizes awarded. Events with two or more participants will be listed under the team events category. The team events set no limit on the number of participants and the teams will decide on their own terms regarding how to split the prizes awarded. + +## Championship Schedule + +October 31, 2023: Deadline for Sponsorship Registration + +November 1, 2023 – November 30, 2023: Event Launch an Announcement of Projects + +December 1, 2023 – February 16, 2024: Registration and Competitive Events + +February 17, 2024 – March 1, 2024: Host Assessment of Submissions and Announcement of Winners + +Early April, 2024: Awards Ceremony and RISC-V Technical Seminar + +## Call for Sponsors + +This championship is open to manufacturer sponsorship. We welcome donations from RISC-V manufacturers and look forward to collaborations. + +### Sponsorship Contributions and Perks + +The sponsors may participate in project and prize designs. The sponsors will also be advertised during the events. +Sponsorships start at CNY 200,000 and cap at CNY 1,000,000 (subject to change). Sponsors may negotiate and customize their contribution based on the number of projects and amount of prizes proposed. + +Sponsorships will be utilized as follows: + +- 30% of the amount donated will be used for event organization, as well as costs incurred for staffing, organization, and promotion. + +- 70% of the amount donated will be used as prizes. + +Sponsor perks are as follows: + +- Specifying hardware devices or platforms as porting and optimization targets. + +- Designing competitive projects and rights to derive project designs (more detailed rules to follow). + +- Designing prize distribution schemes and assessing submissions with the host. + +- Attending the awards ceremony and the RISC-V technical seminar, with a 20 minute keynote segment, as well as promotions and hiring, stands, and invitation to the contributors’ dinner. + +- Participating in other host promotional activities, including both in-person and live online events. + +Those who are interested in becoming a sponsor, please get in touch with us: + +- **To: “Wei Wu”** wuwei2016@iscas.ac.cn + +- **Subject: “[RVPOC] Sponsor + your_company_name”** + +## Template: Project Design + +We are currently calling for competitive project designs. Anyone from the various communities for the RISC-V ecosystem are welcome to contribute project designs. Designs may be in the form of a wish list or a software port or optimization. + +Those who are interested in submitting a project design, please submit them here: + +- **To:“Wei Wu”** wuwei2016@iscas.ac.cn + +- **Subject:“[RVPOC] WISHLIST + the software you want to run on rv”** + +### Event Class: Porting Capture-the-Flag + +Winning participants must open source their submissions and contribute their changes to the upstream project. + +| Type | Project | Reference Prizes(in CNY) | Assessment Platform | Sponsor | +| -------- | ----------------------------------- | ------------------- | ----------- | -------- | +| Runtime | Mono on RISC-V | 50,000 | SG2042 QEMU | TBA | +| Runtime | RISC-V V-extension port WASM SIMD REVEC in V8 | 100,000 | SG2042 QEMU | TBA | +| Runtime | Contributions and ideas welcome! | | | | + +### Event Class: Optimization Sprint + +Both open-source and closed source tracks will be hosted. Participants must take part in the open-source track to receive prizes. + +| Type | Project | Reference Prizes(in CNY)| Assessment Platform | Sponsor | +| ------ | ---------- | -------------------- | -------- | -------- | +| JavaScript Engine | Firefox Kraken benchmark optimization | 5,000 | LicheePi 4A SG2042 | TBD | +| JavaScript Engine | V8 bit-ops optimization using the RISC-V B-extensions | 30,000 | Unmatched SG2042 TH1520 | TBD | +| Games | OpenRA optimization on SG2042 platforms (in frames-per-second) | 100,000 | SG2042 SG2044 | TBD | +| rvv0p7 | Translation tool or system forrunning RVV1.0-optimized applications on RVV0.7 hardware that offers maximal performance | 200,000 | | TBD | +| rvv0p7 | Contributions and ideas welcome!| | | | + +## Organization of the Accreditation Committees + +The host (the PLCT Lab) will assemble an Accreditation Committee for each competitive project with open rosters, consisting of industry-renowned developers, sponsorship representatives, vendor representatives, as well as volunteers. The Accreditation Committees will reproduce and assess the submitted results. + +## Championship Awards Ceremony and RISC-V Technical Seminar + +Date: Early April, 2024. +Location: Hangzhou (venue pending, sponsorships welcome). +Format: In-person full-day seminar. +Agenda: To be announced March, 2024. + +## Note to Participants (Updates Forthcoming) + +1.This championship accepts both individual and team participants, with no limit on the number of registered participants. + +2.The competitions will run both open-source and closed source (commercial) tracks. Only participants of the open-source track are eligible for receiving prizes. Those who participate in the closed source (commercial) track will only be recorded in event ranking. + +3.We welcome participants from all countries and regions. Participants from mainland China needs to provide details on their domestic bank cards to receive prizes; +non-mainland China participants must submit their passport or boarder pass information, as well as their bank account details (banks must be SWIFT or CIPS members). + +4.More detailed notes forthcoming. diff --git a/content/ko/news/001.md b/content/ko/news/001.md new file mode 100644 index 0000000..0197875 --- /dev/null +++ b/content/ko/news/001.md @@ -0,0 +1,38 @@ ++++ +title = '快讯｜RuyiSDK 现已支持 Canaan K230 芯片, RevyOS 小队完成 RevyOS 的初步适配' +date = 2024-02-29 ++++ + +![pic1.jpg](/news-images/pic1.jpg) + + + +**项目地址**: + +- GitHub - revyos/k230-linux-kernel: K230 linux kernel + https://github.com/revyos/k230-linux-kernel/tree/k230-v6.8 +- RuyiSDK/RevyOS + https://github.com/ruyisdk/revyos + +中国科学院软件研究所 RuyiSDK 团队成功支持了 Canaan K230 芯片，这一成就离不开开源社区的好心人 **Cyyself（Yangyu Chen）** 同学的卓越贡献。Cyyself 是 PLCT-CAAT 小队实习生，他在移植 K230 新内核方面付出了巨大的努力，为 RevyOS 的发展做出了重要贡献。 + +**RevyOS** 是一款专为 **T-Head** 芯片生态定制的 **Debian** 优化发行版。它围绕着 **c906fdv/c910v/c908** 等芯片提供了全面的适配和优化支持。默认集成了 **RVV0.7.1** 和 **XThead** 的 **GCC** 工具链，搭载了使用 **RVV0.7.1** 指令集优化过的 **glibc** 和 **kernel** 。目前，**RevyOS** 已经能够满足用户在办公、网页浏览和观看视频等方面的基本需求。在硬件平台上，例如 **Lichee RV** 和 **Lichee Pi 4A** ，**RevyOS** 能够提供优秀的性能和极佳的体验。 + +如果您想获取 **RevyOS** 的最新版镜像，请访问**中国科学院软件研究所**的开源镜像站（佳毅小队维护，有问题可以直接找他）。您可以根据所使用的设备获取对应的镜像。此外，**RevyOS** 还在稳定发布 **Lichee Pi 4A** 用户版镜像的同时，适用于 **LicheePi Cluster 4A** 的主线内核版本镜像也已发布。 + +**RevyOS**的用户版镜像包含 **U-boot** 、**boot** 和 **root** 文件。刷写方式请参考镜像刷写教程。 + +**Canaan K230**是一款内置双核玄铁C908 **RISC-V**芯片, 主频高达 **1.6GHz**，并配备第三代 **KPU** 处理单元的开发板，提供强劲的本地 **AI** 推理能力。它是专业开发人员搭建原型设计、评估性能的理想选择。 + +Links: + +- 镜像刷写教程 + https://wiki.sipeed.com/hardware/zh/lichee/th1520/lpi4a/4burnimage.html#%E6%89%B9%E9%87%8F%E7%83%A7%E5%BD%95)。 +- K230 + https://www.canaan-creative.com/product/k230 +- revyos/k230-linux-kernel: K230 linux kernel + https://github.com/revyos/k230-linux-kernel/tree/k230-v6.8 +- RuyiSDK/RevyOS + https://github.com/ruyisdk/revyos + +![pic2.jpg](/news-images/pic2.jpg) \ No newline at end of file diff --git a/content/ko/news/002.md b/content/ko/news/002.md new file mode 100644 index 0000000..e683bc5 --- /dev/null +++ b/content/ko/news/002.md @@ -0,0 +1,86 @@ ++++ +title = '玄铁团队与PLCT实验室联合发布：新32位产品级开源工具链及Linux内核' +date = 2024-03-11 ++++ + +> AIoT技术的快速发展不断推高了对微控制器（MCU）和应用处理器（AP）计算能力的需求，这使得传统32位架构的性能局限性日益明显。在此架构中，内存访问和原子操作指令不再能有效满足现代操作系统的性能要求和精巧设计，从而推动了向64位硬件架构的转变。在这种转变中，32位软件在64位架构上运行时存在指针宽度与硬件寄存器宽度不匹配的问题。在过去的 64ILP32 ABI 实践中是通过编译器添加零扩展指令来解决这一不匹配问题，但这降低了性能。为克服该性能问题，**达摩院-玄铁团队提出了松弛扩展寻址模式（Relaxed-Addressing Mode），并与中科院软件所-PLCT实验室联合发布了业界首款RISC-V新32位产品级开源工具链（rv64ilp32 toolchain）和 Linux 内核**。在对比测试中新32位 Linux 内核展现了诸多优势：相比传统32位，大幅提升内核的综合性能；相比传统64位，Fedora 团队在K230芯片上利用新32位内核节省内存，降低成本。此举旨在充分利用64位硬件的计算优势，从而显著提升了新32位嵌入式系统的综合性能，标志着嵌入式处理器从32位向64位转型的关键进展。 + +## 松弛扩展寻址 + +历史上，64ILP32 ABI的实施面临着的主要障碍是：32位指针与64位寄存器之间的不匹配问题，这不仅引起性能损失，还增加了编译器的复杂性。虽然零扩展寻址（Zero-extend Addressing）在 x86-x32 和 aarch64-ilp32 ABI 中得到采用，但额外的零扩展指令降低了程序效率。与之相比，32ILP32 和 64LP64 ABI 因指针长度与寄存器宽度一致，避免了这种性能开销。面对这些挑战，我们首先考虑了符号扩展寻址（Sign-extend Addressing），它在一定程度上减缓了零扩展的性能问题，但增加了编译器和内核实现的复杂度。于是，我们提出了松弛扩展寻址（Relax-extend Addressing）方案，它通过硬件的指针掩码功能，允许在执行32位寻址操作时忽略64位寄存器的高32位，大幅简化了编译器工作，降低指令数量，并保持了安全性与可靠性。我们对以上三种寻址模式总结如下： + +● 抹零扩展寻址：传统方法，需要编译器生成额外的的指令来清零高32位，导致性能损失。 + +● 符号扩展寻址：改良方案，通过操作系统页表的双重映射，合法化32位符号位扩展，缓解零扩展的性能开销。 + +● 松弛扩展寻址：创新方案，依赖处理器硬件掩码来实现高效寻址，彻底消除了寻址时的性能损失。 + +因此，松弛扩展被我们选定为 RV64ILP32 ABI 的默认寻址模式，它要求 RISC-V 64位处理器支持寻址掩码功能，对硬件设计提出了新的要求。我们在 QEMU 上实验该功能，并证明了基于松弛扩展寻址模式的 RV64ILP32 工具链的有效性。 + +## 新32位内核 + +新32位工具链基于 RISC-V 64ilp32 ABI，融合了松弛扩展寻址技术，让64位硬件流畅运行新32位软件。我们在 qemu 上实现了硬件松弛扩展寻址模式，并用新工具链构建了**业内首款新32位Linux内核**。 + +与传统32位对比，尽管新32位和传统32位都是32位Linux操作系统软件，但新32位得益于64位指令集，其性能显著优于传统32位： + +![pic3.jpg](/news-images/pic3.jpg) + +如上图所示，新32位内核的 iperf3-tcp 测试大幅领先，在软件 ABI 相同的情况下，使用 64 位指令架构能极大提升操作系统的性能。本次qemu 测试仅供参考，请联系硬件供应商获得真实的性能差距报告，本测试用例已在工具链发布包内，请大家直接下载自行体验，动画测试的全过程见下方链接： + +https://mp.weixin.qq.com/s/argIGP4_rUKDm9IRIB-YTg + +与传统64位对比，Fedora 团队完成了 RISC-V 新32位在 k230 硬件平台的适配，新32位避免了39%的内存浪费，其成本优势使 Fedora RISC-V 能在嵌入式领域有更广泛的应用，具体请参考： + +https://fedoraproject.org/wiki/Architectures/RISC-V/64ILP32 + + + +![pic4.jpg](/news-images/pic4.jpg) + + + +![pic5.jpg](/news-images/pic5.jpg) + +## 新32位工具链 + +让32位软件运行在64位硬件上不仅更快而且更省，这正是我们新32位编译器的优势所在，不禁让人想起中国古代田忌赛马的故事，与传统32位比性能，与传统64位比成本。换言之，新32位就是要取代传统32位，与64位形成互补。在进一步的测试中，我们观察到了传统32位的明显不足： + +![pic6.jpg](/news-images/pic6.jpg) + +如上图所示，在处理长数据类型时，传统32位的编译器生成了超过10条额外指令来操作保存的变量。相反，当采用新32位工具链时，编译器会直接利用64位指令来处理这些数据，大幅度减少了所需指令的数量。 + + + +![pic7.jpg](/news-images/pic7.jpg) + +**本次发布的新32位工具链通过了33万个测试用例，其中包含 192133 个 g++ 用例, 与 143498 个 gcc 用例 ，全面覆盖编译器的各项功能，测试结果与 GCC13 release 保持一致，达到产品级质量要求。相比传统32位，它的优势如下：** + +● **更强大的性能：** 新32位编译器在处理长数据类型时更加高效，因为它无需进行额外的寄存器拼接或零扩展操作。这可以显著减少指令数量，提高程序的执行效率，特别是在涉及大量长数据类型操作的情况下。 + +● **更好的兼容性：** 新32位编译器可以与传统64位编译器兼容，因为它们基于相同的硬件指令集。这意味着开发者可以更轻松地将现有的64位汇编代码迁移到新32位平台上，而无需做出太多修改。 + +● **更多的扩展性：** 随着技术的发展和需求的增长，对更大的内存空间和更高性能的需求也在不断增加。新32位的硬件平台可以为未来的扩展性提供了更好的支持，因为它能无缝切换到传统64位以满足更高要求的应用程序。 + +● **产品级的质量：**新32位工具链经过大量测试验证，保证使用的正确性与稳定性，同时在RUYISDK开源仓库中进行维护更新，及时解决用户遇到的各种问题。 + + + +快速上手：https://github.com/ruyisdk/riscv-gnu-toolchain-rv64ilp32/ + +技术支持：https://github.com/ruyisdk/riscv-gnu-toolchain-rv64ilp32/issues/ + + + +## 结束语 + +松弛扩展寻址技术在新**32**位工具链中扮演着关键角色，为嵌入式系统的开发和部署提供了全新的解决方案。作为**业内首款基于松弛扩展寻址技术的新32位产品级开源工具链和Linux内核**，标志着嵌入式系统开发领域的一次重要创新。我们热切期待开发者们积极参与到新32位的开发和完善中，共同提出宝贵的建议和意见，推动新32位不断发展。我们致力于建立一个健康和活跃的开源社区，将持续投入资源和精力，确保新32位的稳定性和可靠性，并不断改进和完善其功能和性能。在此，我们也呼吁更多的硬件厂商加入我们的阵营，共同推动新32位嵌入式系统的发展和创新，为行业带来更多的可能性和机遇。 + +### 相关阅读 + +● [rv64ilp32: The future of the 32-bit Linux](https://mp.weixin.qq.com/s/XTX_jUYzirDQVXaHHR8i1Q) + +### 关于我们 + +●**PLCT GNU**小队是专注**GNU**工具链开发的团队，目前致力于维护**GNU RISC-V**后端支持工作，包括草案支持及性能优化。作为开源社区的积极贡献者，我们矢志不渝地推动**RISC-V**架构在**GNU**工具链中的广泛应用与性能提升，欢迎交流合作。 + +● 达摩院玄铁团队持续深耕**RISC-V**技术研发及生态建设，并陆续推出了一系列玄铁处理器，可满足高中低全系列性能需求。玄铁积极拥抱开源，坚持开放创新，已逐渐构建起以**RISC-V**为核心的生态体系，与生态伙伴协同推动**RISC-V**芯片、开发工具、操作系统、应用解决方案等不同层面的软硬一体化发展。全力推动**RISC-V**软硬全栈技术多领域发展落地，加速实现智能时代的万物互联! \ No newline at end of file diff --git a/content/ko/news/003.md b/content/ko/news/003.md new file mode 100644 index 0000000..499a4d8 --- /dev/null +++ b/content/ko/news/003.md @@ -0,0 +1,39 @@ ++++ +title = '喜讯｜祝贺陈逸轩完成RISC-V国际基金会 RISC-V Advocate 首批认证：全球共4位、唯一女性代表、唯一东亚代表' +date = 2024-03-17 ++++ + +围观地址：https://riscv.org/risc-v-advocates/ + +![pic8.jpg](/news-images/pic8.jpg) + +我们怀着非常激动的心情与所有PLCT实验室的伙伴和支持者分享一个好消息：来自中国科学院软件研究所**PLCT**实验室**GNU工具链小队**的编译器工程师**陈逸轩**同学，经过了10个月的训练和等待，终于通过了RISC-V国际基金会认证，成为首批4名公布的 **RISC-V Advocate（RISC-V倡导者）**，她是目前全球唯一获得认证的女性工程师，也是唯一的东亚面孔。 + +陈逸轩工程师同时兼任**PLCT**实验室武汉办公室主任、并且在（由邱吉博士发起的面向女性编译器工程师职业提升的）**南盘江计划**中担任活跃组织者。她在职业生涯伊始就参与了开源软件社区的贡献，并于**2022**年初加入**PLCT**实验室，成为一名为**RISC-V**开源软件生态的开拓者。 + +目前陈逸轩工程师所在的GNU工具链小队正在招募GCC编译器开发实习生，欢迎在GitHub 上搜索 **plctlab/weloveinterns** 获取最新全面的PLCT实验室招聘信息。 + +**让荣光落于刀锋之上！** + +![pic9.jpg](/news-images/pic9.jpg) + +以下是RISC-V倡导者的介绍（来自于 https://riscv.org/risc-v-advocates/ 内容为机器翻译，请忽略错误） + +RISC-V 倡导者通过全球推广和参与来支持 RISC-V 的进步。 + +倡导者是 RISC-V 爱好者，他们与 RISC-V International 合作，确保全球势头和采用。 成功的倡导者包括工程专业的学生和早期采用者，他们热衷于与社区分享他们对 RISC-V 的知识和热爱。 + +该计划将于 2024 年正式启动，需要每年提交申请，并详细了解您如何获得资格。 2024 年计划的申请现已开放，将于 2024 年 2 月 29 日截止。被接受加入该计划的个人将于 2024 年 3 月 15 日收到通知。该计划按日历年运行。 + +RISC-V 倡导者是对 RISC-V 充满热情并致力于发展和参与 RISC-V 社区的个人。 RISC-V 倡导者计划为社区成员提供工具和资源，以： + +- 扩大他们在 RISC-V 工作中的作用 +- 对当地社区进行 RISC-V 使命和技术方面的教育 +- 吸引 RISC-V 成员参与和社区发展 +- 倡导者的特质：热衷于分享他们对 RISC-V 的知识和热爱。 能够让其他人参与当地社区并通过直接贡献支持生态系统。 + +RISC-V Advocates support RISC-V progress through global promotion and engagement. See requirements to apply below, please **apply here by February, 29 2024**. + +**RISC-V Advocates are individuals passionate about RISC-V and dedicated to growing and engaging the RISC-V community.** + +Questions? Reach out to local (at) riscv (dot) org \ No newline at end of file diff --git a/content/ko/news/004.md b/content/ko/news/004.md new file mode 100644 index 0000000..392d18b --- /dev/null +++ b/content/ko/news/004.md @@ -0,0 +1,32 @@ ++++ +title = '内测邀请：RuyiSDK官方网站即将正式上线' +date = 2024-03-18 ++++ + + +![pic10.jpg](/news-images/pic10.jpg) + +我们很高兴地宣布，RuyiSDK的全新官方网站即将上线！这是我们的一个重要里程碑，我们诚邀您成为我们测试的一部分。 + +RuyiSDK一直致力于提供最前沿的RISC-V软件开发工具和服务，我们的新网站将进一步提升您的用户体验。在正式发布之前，我们希望通过您的参与来完善网站功能，确保一切运行顺畅。**测试参与者可以：** + +- 提前体验网站的最新功能 +- 对网站的未来发展提出建议和反馈 + +**测试时间：** 2024年3月15日至4月1日 + +**如何参与：** 请访问我们的测试页面 ruyisdk.org 开始体验。您的每一条反馈都是对我们至关重要的支持。我们期待着您的宝贵意见，一起打造更好的RuyiSDK。 + + + +**联系方式：** 如有任何疑问，请通过以下方式联系我们： + +- 微信公众号：ruyisdk + +- Github Issues: https://github.com/ruyisdk/ruyisdk-website/issues + +- Github Discussions: https://github.com/ruyisdk/ruyisdk-website/discussions + + + + 感谢您的支持！RuyiSDK团队 \ No newline at end of file diff --git a/content/ko/news/_index.md b/content/ko/news/_index.md new file mode 100644 index 0000000..77c28ba --- /dev/null +++ b/content/ko/news/_index.md @@ -0,0 +1,5 @@ +--- +title: News +summary: This is our recently news. +description: Explore some of recent posts. +--- \ No newline at end of file diff --git a/content/ru/news/00-RISC-V-spoc.md b/content/ru/news/00-RISC-V-spoc.md new file mode 100644 index 0000000..829e200 --- /dev/null +++ b/content/ru/news/00-RISC-V-spoc.md @@ -0,0 +1,146 @@ ++++ +title = 'Preparation for the Inaugural “RISC-V Software Porting and Optimization Championship” Officially Launched' +date = 2023-10-28T00:28:09+08:00 +toc = true +slug = '00' +summary = 'To date, billions of RISC-V devices has already been deployed in the MCU/IoT realms and is poised to challenge established players in the desktop computing, HPC, AI, and database markets. Compared to the embedded and IoT software ecosystem, the world of desktops and servers boast a vast software ecosystem demands considerable porting and optimization efforts.' ++++ + +## Event Name + +RISC-V Software Porting and Optimization Championship + +RISC-V 软件移植及优化锦标赛 + +Чемпионат по портированию и оптимизации программного обеспечения RISC-V + +RISC-V ソフトウェアの移植と最適化チャンピオンシップ + +RISC-V 소프트웨어 포팅 및 최적화 챔피언십 + +## Rationale + +To date, billions of RISC-V devices has already been deployed in the MCU/IoT realms and is poised to challenge established players in the desktop computing, HPC, AI, and database markets. Compared to the embedded and IoT software ecosystem, the world of desktops and servers boast a vast software ecosystem demands considerable porting and optimization efforts. + +In the past few years, the PLCT Lab dedicated a great amount of financial and human resources along with research and development groups around the globe in an effort to enhance RISC-V’s software ecosystem. Today, almost all mainstream Linux distributions are already providing or are actively working to support the RISC-V architectures. Toolchains and runtimes such as GNU, Clang/LLVM, OpenJDK, V8 and SpiderMonkey are now working reliably on RISC-V. + +The fact that open sources software are not as optimized for RISC-V hardware platforms as their x86 and ARM64 counterpart points to the need for more developer input. To help attract developers to the RISC-V ecosystem and to accelerate the advancement of its software ecosystem, the PLCT Lab launched the “RISC-V Software Porting and Optimization Championship.” This championship sets its focus on desktop and server software ecosystems, designing competitive categories for compilers, runtime environments, AI software stacks, etc. and is open to participation by developers around the globe. + +## Championship Organizers + +Host: The PLCT Lab (associated with the Intelligent Software Research Center of the Institute of Software, Chinese Academy of Sciences) + +Event Host: Hangzhou Quancheng Intelligent Software Co., Ltd. + +Co-host: RISC-V China Community (CNRV) + +Note: Organizers are subject to change. Please follow our latest updates on CNRV’s WeChat Official Account. + +## Competitive Categories + +The championship will consist of **porting capture-the-flag** and **optimization sprint** events. + +The **porting capture-the-flag** event sets a particular software for porting to the RISC-V architecture. In essence, the first team or individual to complete and submit the port wins. The host opens a repository for participant submissions, the first to submit their changes and pass the tests will be made the winner. The code submitted during the event will be copyrighted or attributed to the participating individuals or the open source communities that receive the port. We encourage the participants to contribute their code to the upstream projects. + +The **optimization sprint** sets a series of **evaluation criteria**, against which the team or individual’s optimization work will be benchmarked. The teams and individuals will optimize a specified project within a set interval and the best benchmarked project wins. + +Based on the number of participants, the championship will run both individual and team events. For individual events, the participant will complete their work individually and wholly receive any prizes awarded. Events with two or more participants will be listed under the team events category. The team events set no limit on the number of participants and the teams will decide on their own terms regarding how to split the prizes awarded. + +## Championship Schedule + +October 31, 2023: Deadline for Sponsorship Registration + +November 1, 2023 – November 30, 2023: Event Launch an Announcement of Projects + +December 1, 2023 – February 16, 2024: Registration and Competitive Events + +February 17, 2024 – March 1, 2024: Host Assessment of Submissions and Announcement of Winners + +Early April, 2024: Awards Ceremony and RISC-V Technical Seminar + +## Call for Sponsors + +This championship is open to manufacturer sponsorship. We welcome donations from RISC-V manufacturers and look forward to collaborations. + +### Sponsorship Contributions and Perks + +The sponsors may participate in project and prize designs. The sponsors will also be advertised during the events. +Sponsorships start at CNY 200,000 and cap at CNY 1,000,000 (subject to change). Sponsors may negotiate and customize their contribution based on the number of projects and amount of prizes proposed. + +Sponsorships will be utilized as follows: + +- 30% of the amount donated will be used for event organization, as well as costs incurred for staffing, organization, and promotion. + +- 70% of the amount donated will be used as prizes. + +Sponsor perks are as follows: + +- Specifying hardware devices or platforms as porting and optimization targets. + +- Designing competitive projects and rights to derive project designs (more detailed rules to follow). + +- Designing prize distribution schemes and assessing submissions with the host. + +- Attending the awards ceremony and the RISC-V technical seminar, with a 20 minute keynote segment, as well as promotions and hiring, stands, and invitation to the contributors’ dinner. + +- Participating in other host promotional activities, including both in-person and live online events. + +Those who are interested in becoming a sponsor, please get in touch with us: + +- **To: “Wei Wu”** wuwei2016@iscas.ac.cn + +- **Subject: “[RVPOC] Sponsor + your_company_name”** + +## Template: Project Design + +We are currently calling for competitive project designs. Anyone from the various communities for the RISC-V ecosystem are welcome to contribute project designs. Designs may be in the form of a wish list or a software port or optimization. + +Those who are interested in submitting a project design, please submit them here: + +- **To:“Wei Wu”** wuwei2016@iscas.ac.cn + +- **Subject:“[RVPOC] WISHLIST + the software you want to run on rv”** + +### Event Class: Porting Capture-the-Flag + +Winning participants must open source their submissions and contribute their changes to the upstream project. + +| Type | Project | Reference Prizes(in CNY) | Assessment Platform | Sponsor | +| -------- | ----------------------------------- | ------------------- | ----------- | -------- | +| Runtime | Mono on RISC-V | 50,000 | SG2042 QEMU | TBA | +| Runtime | RISC-V V-extension port WASM SIMD REVEC in V8 | 100,000 | SG2042 QEMU | TBA | +| Runtime | Contributions and ideas welcome! | | | | + +### Event Class: Optimization Sprint + +Both open-source and closed source tracks will be hosted. Participants must take part in the open-source track to receive prizes. + +| Type | Project | Reference Prizes(in CNY)| Assessment Platform | Sponsor | +| ------ | ---------- | -------------------- | -------- | -------- | +| JavaScript Engine | Firefox Kraken benchmark optimization | 5,000 | LicheePi 4A SG2042 | TBD | +| JavaScript Engine | V8 bit-ops optimization using the RISC-V B-extensions | 30,000 | Unmatched SG2042 TH1520 | TBD | +| Games | OpenRA optimization on SG2042 platforms (in frames-per-second) | 100,000 | SG2042 SG2044 | TBD | +| rvv0p7 | Translation tool or system forrunning RVV1.0-optimized applications on RVV0.7 hardware that offers maximal performance | 200,000 | | TBD | +| rvv0p7 | Contributions and ideas welcome!| | | | + +## Organization of the Accreditation Committees + +The host (the PLCT Lab) will assemble an Accreditation Committee for each competitive project with open rosters, consisting of industry-renowned developers, sponsorship representatives, vendor representatives, as well as volunteers. The Accreditation Committees will reproduce and assess the submitted results. + +## Championship Awards Ceremony and RISC-V Technical Seminar + +Date: Early April, 2024. +Location: Hangzhou (venue pending, sponsorships welcome). +Format: In-person full-day seminar. +Agenda: To be announced March, 2024. + +## Note to Participants (Updates Forthcoming) + +1.This championship accepts both individual and team participants, with no limit on the number of registered participants. + +2.The competitions will run both open-source and closed source (commercial) tracks. Only participants of the open-source track are eligible for receiving prizes. Those who participate in the closed source (commercial) track will only be recorded in event ranking. + +3.We welcome participants from all countries and regions. Participants from mainland China needs to provide details on their domestic bank cards to receive prizes; +non-mainland China participants must submit their passport or boarder pass information, as well as their bank account details (banks must be SWIFT or CIPS members). + +4.More detailed notes forthcoming. diff --git a/content/ru/news/001.md b/content/ru/news/001.md new file mode 100644 index 0000000..0197875 --- /dev/null +++ b/content/ru/news/001.md @@ -0,0 +1,38 @@ ++++ +title = '快讯｜RuyiSDK 现已支持 Canaan K230 芯片, RevyOS 小队完成 RevyOS 的初步适配' +date = 2024-02-29 ++++ + +![pic1.jpg](/news-images/pic1.jpg) + + + +**项目地址**: + +- GitHub - revyos/k230-linux-kernel: K230 linux kernel + https://github.com/revyos/k230-linux-kernel/tree/k230-v6.8 +- RuyiSDK/RevyOS + https://github.com/ruyisdk/revyos + +中国科学院软件研究所 RuyiSDK 团队成功支持了 Canaan K230 芯片，这一成就离不开开源社区的好心人 **Cyyself（Yangyu Chen）** 同学的卓越贡献。Cyyself 是 PLCT-CAAT 小队实习生，他在移植 K230 新内核方面付出了巨大的努力，为 RevyOS 的发展做出了重要贡献。 + +**RevyOS** 是一款专为 **T-Head** 芯片生态定制的 **Debian** 优化发行版。它围绕着 **c906fdv/c910v/c908** 等芯片提供了全面的适配和优化支持。默认集成了 **RVV0.7.1** 和 **XThead** 的 **GCC** 工具链，搭载了使用 **RVV0.7.1** 指令集优化过的 **glibc** 和 **kernel** 。目前，**RevyOS** 已经能够满足用户在办公、网页浏览和观看视频等方面的基本需求。在硬件平台上，例如 **Lichee RV** 和 **Lichee Pi 4A** ，**RevyOS** 能够提供优秀的性能和极佳的体验。 + +如果您想获取 **RevyOS** 的最新版镜像，请访问**中国科学院软件研究所**的开源镜像站（佳毅小队维护，有问题可以直接找他）。您可以根据所使用的设备获取对应的镜像。此外，**RevyOS** 还在稳定发布 **Lichee Pi 4A** 用户版镜像的同时，适用于 **LicheePi Cluster 4A** 的主线内核版本镜像也已发布。 + +**RevyOS**的用户版镜像包含 **U-boot** 、**boot** 和 **root** 文件。刷写方式请参考镜像刷写教程。 + +**Canaan K230**是一款内置双核玄铁C908 **RISC-V**芯片, 主频高达 **1.6GHz**，并配备第三代 **KPU** 处理单元的开发板，提供强劲的本地 **AI** 推理能力。它是专业开发人员搭建原型设计、评估性能的理想选择。 + +Links: + +- 镜像刷写教程 + https://wiki.sipeed.com/hardware/zh/lichee/th1520/lpi4a/4burnimage.html#%E6%89%B9%E9%87%8F%E7%83%A7%E5%BD%95)。 +- K230 + https://www.canaan-creative.com/product/k230 +- revyos/k230-linux-kernel: K230 linux kernel + https://github.com/revyos/k230-linux-kernel/tree/k230-v6.8 +- RuyiSDK/RevyOS + https://github.com/ruyisdk/revyos + +![pic2.jpg](/news-images/pic2.jpg) \ No newline at end of file diff --git a/content/ru/news/002.md b/content/ru/news/002.md new file mode 100644 index 0000000..e683bc5 --- /dev/null +++ b/content/ru/news/002.md @@ -0,0 +1,86 @@ ++++ +title = '玄铁团队与PLCT实验室联合发布：新32位产品级开源工具链及Linux内核' +date = 2024-03-11 ++++ + +> AIoT技术的快速发展不断推高了对微控制器（MCU）和应用处理器（AP）计算能力的需求，这使得传统32位架构的性能局限性日益明显。在此架构中，内存访问和原子操作指令不再能有效满足现代操作系统的性能要求和精巧设计，从而推动了向64位硬件架构的转变。在这种转变中，32位软件在64位架构上运行时存在指针宽度与硬件寄存器宽度不匹配的问题。在过去的 64ILP32 ABI 实践中是通过编译器添加零扩展指令来解决这一不匹配问题，但这降低了性能。为克服该性能问题，**达摩院-玄铁团队提出了松弛扩展寻址模式（Relaxed-Addressing Mode），并与中科院软件所-PLCT实验室联合发布了业界首款RISC-V新32位产品级开源工具链（rv64ilp32 toolchain）和 Linux 内核**。在对比测试中新32位 Linux 内核展现了诸多优势：相比传统32位，大幅提升内核的综合性能；相比传统64位，Fedora 团队在K230芯片上利用新32位内核节省内存，降低成本。此举旨在充分利用64位硬件的计算优势，从而显著提升了新32位嵌入式系统的综合性能，标志着嵌入式处理器从32位向64位转型的关键进展。 + +## 松弛扩展寻址 + +历史上，64ILP32 ABI的实施面临着的主要障碍是：32位指针与64位寄存器之间的不匹配问题，这不仅引起性能损失，还增加了编译器的复杂性。虽然零扩展寻址（Zero-extend Addressing）在 x86-x32 和 aarch64-ilp32 ABI 中得到采用，但额外的零扩展指令降低了程序效率。与之相比，32ILP32 和 64LP64 ABI 因指针长度与寄存器宽度一致，避免了这种性能开销。面对这些挑战，我们首先考虑了符号扩展寻址（Sign-extend Addressing），它在一定程度上减缓了零扩展的性能问题，但增加了编译器和内核实现的复杂度。于是，我们提出了松弛扩展寻址（Relax-extend Addressing）方案，它通过硬件的指针掩码功能，允许在执行32位寻址操作时忽略64位寄存器的高32位，大幅简化了编译器工作，降低指令数量，并保持了安全性与可靠性。我们对以上三种寻址模式总结如下： + +● 抹零扩展寻址：传统方法，需要编译器生成额外的的指令来清零高32位，导致性能损失。 + +● 符号扩展寻址：改良方案，通过操作系统页表的双重映射，合法化32位符号位扩展，缓解零扩展的性能开销。 + +● 松弛扩展寻址：创新方案，依赖处理器硬件掩码来实现高效寻址，彻底消除了寻址时的性能损失。 + +因此，松弛扩展被我们选定为 RV64ILP32 ABI 的默认寻址模式，它要求 RISC-V 64位处理器支持寻址掩码功能，对硬件设计提出了新的要求。我们在 QEMU 上实验该功能，并证明了基于松弛扩展寻址模式的 RV64ILP32 工具链的有效性。 + +## 新32位内核 + +新32位工具链基于 RISC-V 64ilp32 ABI，融合了松弛扩展寻址技术，让64位硬件流畅运行新32位软件。我们在 qemu 上实现了硬件松弛扩展寻址模式，并用新工具链构建了**业内首款新32位Linux内核**。 + +与传统32位对比，尽管新32位和传统32位都是32位Linux操作系统软件，但新32位得益于64位指令集，其性能显著优于传统32位： + +![pic3.jpg](/news-images/pic3.jpg) + +如上图所示，新32位内核的 iperf3-tcp 测试大幅领先，在软件 ABI 相同的情况下，使用 64 位指令架构能极大提升操作系统的性能。本次qemu 测试仅供参考，请联系硬件供应商获得真实的性能差距报告，本测试用例已在工具链发布包内，请大家直接下载自行体验，动画测试的全过程见下方链接： + +https://mp.weixin.qq.com/s/argIGP4_rUKDm9IRIB-YTg + +与传统64位对比，Fedora 团队完成了 RISC-V 新32位在 k230 硬件平台的适配，新32位避免了39%的内存浪费，其成本优势使 Fedora RISC-V 能在嵌入式领域有更广泛的应用，具体请参考： + +https://fedoraproject.org/wiki/Architectures/RISC-V/64ILP32 + + + +![pic4.jpg](/news-images/pic4.jpg) + + + +![pic5.jpg](/news-images/pic5.jpg) + +## 新32位工具链 + +让32位软件运行在64位硬件上不仅更快而且更省，这正是我们新32位编译器的优势所在，不禁让人想起中国古代田忌赛马的故事，与传统32位比性能，与传统64位比成本。换言之，新32位就是要取代传统32位，与64位形成互补。在进一步的测试中，我们观察到了传统32位的明显不足： + +![pic6.jpg](/news-images/pic6.jpg) + +如上图所示，在处理长数据类型时，传统32位的编译器生成了超过10条额外指令来操作保存的变量。相反，当采用新32位工具链时，编译器会直接利用64位指令来处理这些数据，大幅度减少了所需指令的数量。 + + + +![pic7.jpg](/news-images/pic7.jpg) + +**本次发布的新32位工具链通过了33万个测试用例，其中包含 192133 个 g++ 用例, 与 143498 个 gcc 用例 ，全面覆盖编译器的各项功能，测试结果与 GCC13 release 保持一致，达到产品级质量要求。相比传统32位，它的优势如下：** + +● **更强大的性能：** 新32位编译器在处理长数据类型时更加高效，因为它无需进行额外的寄存器拼接或零扩展操作。这可以显著减少指令数量，提高程序的执行效率，特别是在涉及大量长数据类型操作的情况下。 + +● **更好的兼容性：** 新32位编译器可以与传统64位编译器兼容，因为它们基于相同的硬件指令集。这意味着开发者可以更轻松地将现有的64位汇编代码迁移到新32位平台上，而无需做出太多修改。 + +● **更多的扩展性：** 随着技术的发展和需求的增长，对更大的内存空间和更高性能的需求也在不断增加。新32位的硬件平台可以为未来的扩展性提供了更好的支持，因为它能无缝切换到传统64位以满足更高要求的应用程序。 + +● **产品级的质量：**新32位工具链经过大量测试验证，保证使用的正确性与稳定性，同时在RUYISDK开源仓库中进行维护更新，及时解决用户遇到的各种问题。 + + + +快速上手：https://github.com/ruyisdk/riscv-gnu-toolchain-rv64ilp32/ + +技术支持：https://github.com/ruyisdk/riscv-gnu-toolchain-rv64ilp32/issues/ + + + +## 结束语 + +松弛扩展寻址技术在新**32**位工具链中扮演着关键角色，为嵌入式系统的开发和部署提供了全新的解决方案。作为**业内首款基于松弛扩展寻址技术的新32位产品级开源工具链和Linux内核**，标志着嵌入式系统开发领域的一次重要创新。我们热切期待开发者们积极参与到新32位的开发和完善中，共同提出宝贵的建议和意见，推动新32位不断发展。我们致力于建立一个健康和活跃的开源社区，将持续投入资源和精力，确保新32位的稳定性和可靠性，并不断改进和完善其功能和性能。在此，我们也呼吁更多的硬件厂商加入我们的阵营，共同推动新32位嵌入式系统的发展和创新，为行业带来更多的可能性和机遇。 + +### 相关阅读 + +● [rv64ilp32: The future of the 32-bit Linux](https://mp.weixin.qq.com/s/XTX_jUYzirDQVXaHHR8i1Q) + +### 关于我们 + +●**PLCT GNU**小队是专注**GNU**工具链开发的团队，目前致力于维护**GNU RISC-V**后端支持工作，包括草案支持及性能优化。作为开源社区的积极贡献者，我们矢志不渝地推动**RISC-V**架构在**GNU**工具链中的广泛应用与性能提升，欢迎交流合作。 + +● 达摩院玄铁团队持续深耕**RISC-V**技术研发及生态建设，并陆续推出了一系列玄铁处理器，可满足高中低全系列性能需求。玄铁积极拥抱开源，坚持开放创新，已逐渐构建起以**RISC-V**为核心的生态体系，与生态伙伴协同推动**RISC-V**芯片、开发工具、操作系统、应用解决方案等不同层面的软硬一体化发展。全力推动**RISC-V**软硬全栈技术多领域发展落地，加速实现智能时代的万物互联! \ No newline at end of file diff --git a/content/ru/news/003.md b/content/ru/news/003.md new file mode 100644 index 0000000..499a4d8 --- /dev/null +++ b/content/ru/news/003.md @@ -0,0 +1,39 @@ ++++ +title = '喜讯｜祝贺陈逸轩完成RISC-V国际基金会 RISC-V Advocate 首批认证：全球共4位、唯一女性代表、唯一东亚代表' +date = 2024-03-17 ++++ + +围观地址：https://riscv.org/risc-v-advocates/ + +![pic8.jpg](/news-images/pic8.jpg) + +我们怀着非常激动的心情与所有PLCT实验室的伙伴和支持者分享一个好消息：来自中国科学院软件研究所**PLCT**实验室**GNU工具链小队**的编译器工程师**陈逸轩**同学，经过了10个月的训练和等待，终于通过了RISC-V国际基金会认证，成为首批4名公布的 **RISC-V Advocate（RISC-V倡导者）**，她是目前全球唯一获得认证的女性工程师，也是唯一的东亚面孔。 + +陈逸轩工程师同时兼任**PLCT**实验室武汉办公室主任、并且在（由邱吉博士发起的面向女性编译器工程师职业提升的）**南盘江计划**中担任活跃组织者。她在职业生涯伊始就参与了开源软件社区的贡献，并于**2022**年初加入**PLCT**实验室，成为一名为**RISC-V**开源软件生态的开拓者。 + +目前陈逸轩工程师所在的GNU工具链小队正在招募GCC编译器开发实习生，欢迎在GitHub 上搜索 **plctlab/weloveinterns** 获取最新全面的PLCT实验室招聘信息。 + +**让荣光落于刀锋之上！** + +![pic9.jpg](/news-images/pic9.jpg) + +以下是RISC-V倡导者的介绍（来自于 https://riscv.org/risc-v-advocates/ 内容为机器翻译，请忽略错误） + +RISC-V 倡导者通过全球推广和参与来支持 RISC-V 的进步。 + +倡导者是 RISC-V 爱好者，他们与 RISC-V International 合作，确保全球势头和采用。 成功的倡导者包括工程专业的学生和早期采用者，他们热衷于与社区分享他们对 RISC-V 的知识和热爱。 + +该计划将于 2024 年正式启动，需要每年提交申请，并详细了解您如何获得资格。 2024 年计划的申请现已开放，将于 2024 年 2 月 29 日截止。被接受加入该计划的个人将于 2024 年 3 月 15 日收到通知。该计划按日历年运行。 + +RISC-V 倡导者是对 RISC-V 充满热情并致力于发展和参与 RISC-V 社区的个人。 RISC-V 倡导者计划为社区成员提供工具和资源，以： + +- 扩大他们在 RISC-V 工作中的作用 +- 对当地社区进行 RISC-V 使命和技术方面的教育 +- 吸引 RISC-V 成员参与和社区发展 +- 倡导者的特质：热衷于分享他们对 RISC-V 的知识和热爱。 能够让其他人参与当地社区并通过直接贡献支持生态系统。 + +RISC-V Advocates support RISC-V progress through global promotion and engagement. See requirements to apply below, please **apply here by February, 29 2024**. + +**RISC-V Advocates are individuals passionate about RISC-V and dedicated to growing and engaging the RISC-V community.** + +Questions? Reach out to local (at) riscv (dot) org \ No newline at end of file diff --git a/content/ru/news/004.md b/content/ru/news/004.md new file mode 100644 index 0000000..392d18b --- /dev/null +++ b/content/ru/news/004.md @@ -0,0 +1,32 @@ ++++ +title = '内测邀请：RuyiSDK官方网站即将正式上线' +date = 2024-03-18 ++++ + + +![pic10.jpg](/news-images/pic10.jpg) + +我们很高兴地宣布，RuyiSDK的全新官方网站即将上线！这是我们的一个重要里程碑，我们诚邀您成为我们测试的一部分。 + +RuyiSDK一直致力于提供最前沿的RISC-V软件开发工具和服务，我们的新网站将进一步提升您的用户体验。在正式发布之前，我们希望通过您的参与来完善网站功能，确保一切运行顺畅。**测试参与者可以：** + +- 提前体验网站的最新功能 +- 对网站的未来发展提出建议和反馈 + +**测试时间：** 2024年3月15日至4月1日 + +**如何参与：** 请访问我们的测试页面 ruyisdk.org 开始体验。您的每一条反馈都是对我们至关重要的支持。我们期待着您的宝贵意见，一起打造更好的RuyiSDK。 + + + +**联系方式：** 如有任何疑问，请通过以下方式联系我们： + +- 微信公众号：ruyisdk + +- Github Issues: https://github.com/ruyisdk/ruyisdk-website/issues + +- Github Discussions: https://github.com/ruyisdk/ruyisdk-website/discussions + + + + 感谢您的支持！RuyiSDK团队 \ No newline at end of file diff --git a/content/ru/news/_index.md b/content/ru/news/_index.md new file mode 100644 index 0000000..77c28ba --- /dev/null +++ b/content/ru/news/_index.md @@ -0,0 +1,5 @@ +--- +title: News +summary: This is our recently news. +description: Explore some of recent posts. +--- \ No newline at end of file diff --git a/content/zh/news/00-RISC-V-spoc.md b/content/zh/news/00-RISC-V-spoc.md new file mode 100644 index 0000000..829e200 --- /dev/null +++ b/content/zh/news/00-RISC-V-spoc.md @@ -0,0 +1,146 @@ ++++ +title = 'Preparation for the Inaugural “RISC-V Software Porting and Optimization Championship” Officially Launched' +date = 2023-10-28T00:28:09+08:00 +toc = true +slug = '00' +summary = 'To date, billions of RISC-V devices has already been deployed in the MCU/IoT realms and is poised to challenge established players in the desktop computing, HPC, AI, and database markets. Compared to the embedded and IoT software ecosystem, the world of desktops and servers boast a vast software ecosystem demands considerable porting and optimization efforts.' ++++ + +## Event Name + +RISC-V Software Porting and Optimization Championship + +RISC-V 软件移植及优化锦标赛 + +Чемпионат по портированию и оптимизации программного обеспечения RISC-V + +RISC-V ソフトウェアの移植と最適化チャンピオンシップ + +RISC-V 소프트웨어 포팅 및 최적화 챔피언십 + +## Rationale + +To date, billions of RISC-V devices has already been deployed in the MCU/IoT realms and is poised to challenge established players in the desktop computing, HPC, AI, and database markets. Compared to the embedded and IoT software ecosystem, the world of desktops and servers boast a vast software ecosystem demands considerable porting and optimization efforts. + +In the past few years, the PLCT Lab dedicated a great amount of financial and human resources along with research and development groups around the globe in an effort to enhance RISC-V’s software ecosystem. Today, almost all mainstream Linux distributions are already providing or are actively working to support the RISC-V architectures. Toolchains and runtimes such as GNU, Clang/LLVM, OpenJDK, V8 and SpiderMonkey are now working reliably on RISC-V. + +The fact that open sources software are not as optimized for RISC-V hardware platforms as their x86 and ARM64 counterpart points to the need for more developer input. To help attract developers to the RISC-V ecosystem and to accelerate the advancement of its software ecosystem, the PLCT Lab launched the “RISC-V Software Porting and Optimization Championship.” This championship sets its focus on desktop and server software ecosystems, designing competitive categories for compilers, runtime environments, AI software stacks, etc. and is open to participation by developers around the globe. + +## Championship Organizers + +Host: The PLCT Lab (associated with the Intelligent Software Research Center of the Institute of Software, Chinese Academy of Sciences) + +Event Host: Hangzhou Quancheng Intelligent Software Co., Ltd. + +Co-host: RISC-V China Community (CNRV) + +Note: Organizers are subject to change. Please follow our latest updates on CNRV’s WeChat Official Account. + +## Competitive Categories + +The championship will consist of **porting capture-the-flag** and **optimization sprint** events. + +The **porting capture-the-flag** event sets a particular software for porting to the RISC-V architecture. In essence, the first team or individual to complete and submit the port wins. The host opens a repository for participant submissions, the first to submit their changes and pass the tests will be made the winner. The code submitted during the event will be copyrighted or attributed to the participating individuals or the open source communities that receive the port. We encourage the participants to contribute their code to the upstream projects. + +The **optimization sprint** sets a series of **evaluation criteria**, against which the team or individual’s optimization work will be benchmarked. The teams and individuals will optimize a specified project within a set interval and the best benchmarked project wins. + +Based on the number of participants, the championship will run both individual and team events. For individual events, the participant will complete their work individually and wholly receive any prizes awarded. Events with two or more participants will be listed under the team events category. The team events set no limit on the number of participants and the teams will decide on their own terms regarding how to split the prizes awarded. + +## Championship Schedule + +October 31, 2023: Deadline for Sponsorship Registration + +November 1, 2023 – November 30, 2023: Event Launch an Announcement of Projects + +December 1, 2023 – February 16, 2024: Registration and Competitive Events + +February 17, 2024 – March 1, 2024: Host Assessment of Submissions and Announcement of Winners + +Early April, 2024: Awards Ceremony and RISC-V Technical Seminar + +## Call for Sponsors + +This championship is open to manufacturer sponsorship. We welcome donations from RISC-V manufacturers and look forward to collaborations. + +### Sponsorship Contributions and Perks + +The sponsors may participate in project and prize designs. The sponsors will also be advertised during the events. +Sponsorships start at CNY 200,000 and cap at CNY 1,000,000 (subject to change). Sponsors may negotiate and customize their contribution based on the number of projects and amount of prizes proposed. + +Sponsorships will be utilized as follows: + +- 30% of the amount donated will be used for event organization, as well as costs incurred for staffing, organization, and promotion. + +- 70% of the amount donated will be used as prizes. + +Sponsor perks are as follows: + +- Specifying hardware devices or platforms as porting and optimization targets. + +- Designing competitive projects and rights to derive project designs (more detailed rules to follow). + +- Designing prize distribution schemes and assessing submissions with the host. + +- Attending the awards ceremony and the RISC-V technical seminar, with a 20 minute keynote segment, as well as promotions and hiring, stands, and invitation to the contributors’ dinner. + +- Participating in other host promotional activities, including both in-person and live online events. + +Those who are interested in becoming a sponsor, please get in touch with us: + +- **To: “Wei Wu”** wuwei2016@iscas.ac.cn + +- **Subject: “[RVPOC] Sponsor + your_company_name”** + +## Template: Project Design + +We are currently calling for competitive project designs. Anyone from the various communities for the RISC-V ecosystem are welcome to contribute project designs. Designs may be in the form of a wish list or a software port or optimization. + +Those who are interested in submitting a project design, please submit them here: + +- **To:“Wei Wu”** wuwei2016@iscas.ac.cn + +- **Subject:“[RVPOC] WISHLIST + the software you want to run on rv”** + +### Event Class: Porting Capture-the-Flag + +Winning participants must open source their submissions and contribute their changes to the upstream project. + +| Type | Project | Reference Prizes(in CNY) | Assessment Platform | Sponsor | +| -------- | ----------------------------------- | ------------------- | ----------- | -------- | +| Runtime | Mono on RISC-V | 50,000 | SG2042 QEMU | TBA | +| Runtime | RISC-V V-extension port WASM SIMD REVEC in V8 | 100,000 | SG2042 QEMU | TBA | +| Runtime | Contributions and ideas welcome! | | | | + +### Event Class: Optimization Sprint + +Both open-source and closed source tracks will be hosted. Participants must take part in the open-source track to receive prizes. + +| Type | Project | Reference Prizes(in CNY)| Assessment Platform | Sponsor | +| ------ | ---------- | -------------------- | -------- | -------- | +| JavaScript Engine | Firefox Kraken benchmark optimization | 5,000 | LicheePi 4A SG2042 | TBD | +| JavaScript Engine | V8 bit-ops optimization using the RISC-V B-extensions | 30,000 | Unmatched SG2042 TH1520 | TBD | +| Games | OpenRA optimization on SG2042 platforms (in frames-per-second) | 100,000 | SG2042 SG2044 | TBD | +| rvv0p7 | Translation tool or system forrunning RVV1.0-optimized applications on RVV0.7 hardware that offers maximal performance | 200,000 | | TBD | +| rvv0p7 | Contributions and ideas welcome!| | | | + +## Organization of the Accreditation Committees + +The host (the PLCT Lab) will assemble an Accreditation Committee for each competitive project with open rosters, consisting of industry-renowned developers, sponsorship representatives, vendor representatives, as well as volunteers. The Accreditation Committees will reproduce and assess the submitted results. + +## Championship Awards Ceremony and RISC-V Technical Seminar + +Date: Early April, 2024. +Location: Hangzhou (venue pending, sponsorships welcome). +Format: In-person full-day seminar. +Agenda: To be announced March, 2024. + +## Note to Participants (Updates Forthcoming) + +1.This championship accepts both individual and team participants, with no limit on the number of registered participants. + +2.The competitions will run both open-source and closed source (commercial) tracks. Only participants of the open-source track are eligible for receiving prizes. Those who participate in the closed source (commercial) track will only be recorded in event ranking. + +3.We welcome participants from all countries and regions. Participants from mainland China needs to provide details on their domestic bank cards to receive prizes; +non-mainland China participants must submit their passport or boarder pass information, as well as their bank account details (banks must be SWIFT or CIPS members). + +4.More detailed notes forthcoming. diff --git a/content/zh/news/001.md b/content/zh/news/001.md new file mode 100644 index 0000000..0197875 --- /dev/null +++ b/content/zh/news/001.md @@ -0,0 +1,38 @@ ++++ +title = '快讯｜RuyiSDK 现已支持 Canaan K230 芯片, RevyOS 小队完成 RevyOS 的初步适配' +date = 2024-02-29 ++++ + +![pic1.jpg](/news-images/pic1.jpg) + + + +**项目地址**: + +- GitHub - revyos/k230-linux-kernel: K230 linux kernel + https://github.com/revyos/k230-linux-kernel/tree/k230-v6.8 +- RuyiSDK/RevyOS + https://github.com/ruyisdk/revyos + +中国科学院软件研究所 RuyiSDK 团队成功支持了 Canaan K230 芯片，这一成就离不开开源社区的好心人 **Cyyself（Yangyu Chen）** 同学的卓越贡献。Cyyself 是 PLCT-CAAT 小队实习生，他在移植 K230 新内核方面付出了巨大的努力，为 RevyOS 的发展做出了重要贡献。 + +**RevyOS** 是一款专为 **T-Head** 芯片生态定制的 **Debian** 优化发行版。它围绕着 **c906fdv/c910v/c908** 等芯片提供了全面的适配和优化支持。默认集成了 **RVV0.7.1** 和 **XThead** 的 **GCC** 工具链，搭载了使用 **RVV0.7.1** 指令集优化过的 **glibc** 和 **kernel** 。目前，**RevyOS** 已经能够满足用户在办公、网页浏览和观看视频等方面的基本需求。在硬件平台上，例如 **Lichee RV** 和 **Lichee Pi 4A** ，**RevyOS** 能够提供优秀的性能和极佳的体验。 + +如果您想获取 **RevyOS** 的最新版镜像，请访问**中国科学院软件研究所**的开源镜像站（佳毅小队维护，有问题可以直接找他）。您可以根据所使用的设备获取对应的镜像。此外，**RevyOS** 还在稳定发布 **Lichee Pi 4A** 用户版镜像的同时，适用于 **LicheePi Cluster 4A** 的主线内核版本镜像也已发布。 + +**RevyOS**的用户版镜像包含 **U-boot** 、**boot** 和 **root** 文件。刷写方式请参考镜像刷写教程。 + +**Canaan K230**是一款内置双核玄铁C908 **RISC-V**芯片, 主频高达 **1.6GHz**，并配备第三代 **KPU** 处理单元的开发板，提供强劲的本地 **AI** 推理能力。它是专业开发人员搭建原型设计、评估性能的理想选择。 + +Links: + +- 镜像刷写教程 + https://wiki.sipeed.com/hardware/zh/lichee/th1520/lpi4a/4burnimage.html#%E6%89%B9%E9%87%8F%E7%83%A7%E5%BD%95)。 +- K230 + https://www.canaan-creative.com/product/k230 +- revyos/k230-linux-kernel: K230 linux kernel + https://github.com/revyos/k230-linux-kernel/tree/k230-v6.8 +- RuyiSDK/RevyOS + https://github.com/ruyisdk/revyos + +![pic2.jpg](/news-images/pic2.jpg) \ No newline at end of file diff --git a/content/zh/news/002.md b/content/zh/news/002.md new file mode 100644 index 0000000..e683bc5 --- /dev/null +++ b/content/zh/news/002.md @@ -0,0 +1,86 @@ ++++ +title = '玄铁团队与PLCT实验室联合发布：新32位产品级开源工具链及Linux内核' +date = 2024-03-11 ++++ + +> AIoT技术的快速发展不断推高了对微控制器（MCU）和应用处理器（AP）计算能力的需求，这使得传统32位架构的性能局限性日益明显。在此架构中，内存访问和原子操作指令不再能有效满足现代操作系统的性能要求和精巧设计，从而推动了向64位硬件架构的转变。在这种转变中，32位软件在64位架构上运行时存在指针宽度与硬件寄存器宽度不匹配的问题。在过去的 64ILP32 ABI 实践中是通过编译器添加零扩展指令来解决这一不匹配问题，但这降低了性能。为克服该性能问题，**达摩院-玄铁团队提出了松弛扩展寻址模式（Relaxed-Addressing Mode），并与中科院软件所-PLCT实验室联合发布了业界首款RISC-V新32位产品级开源工具链（rv64ilp32 toolchain）和 Linux 内核**。在对比测试中新32位 Linux 内核展现了诸多优势：相比传统32位，大幅提升内核的综合性能；相比传统64位，Fedora 团队在K230芯片上利用新32位内核节省内存，降低成本。此举旨在充分利用64位硬件的计算优势，从而显著提升了新32位嵌入式系统的综合性能，标志着嵌入式处理器从32位向64位转型的关键进展。 + +## 松弛扩展寻址 + +历史上，64ILP32 ABI的实施面临着的主要障碍是：32位指针与64位寄存器之间的不匹配问题，这不仅引起性能损失，还增加了编译器的复杂性。虽然零扩展寻址（Zero-extend Addressing）在 x86-x32 和 aarch64-ilp32 ABI 中得到采用，但额外的零扩展指令降低了程序效率。与之相比，32ILP32 和 64LP64 ABI 因指针长度与寄存器宽度一致，避免了这种性能开销。面对这些挑战，我们首先考虑了符号扩展寻址（Sign-extend Addressing），它在一定程度上减缓了零扩展的性能问题，但增加了编译器和内核实现的复杂度。于是，我们提出了松弛扩展寻址（Relax-extend Addressing）方案，它通过硬件的指针掩码功能，允许在执行32位寻址操作时忽略64位寄存器的高32位，大幅简化了编译器工作，降低指令数量，并保持了安全性与可靠性。我们对以上三种寻址模式总结如下： + +● 抹零扩展寻址：传统方法，需要编译器生成额外的的指令来清零高32位，导致性能损失。 + +● 符号扩展寻址：改良方案，通过操作系统页表的双重映射，合法化32位符号位扩展，缓解零扩展的性能开销。 + +● 松弛扩展寻址：创新方案，依赖处理器硬件掩码来实现高效寻址，彻底消除了寻址时的性能损失。 + +因此，松弛扩展被我们选定为 RV64ILP32 ABI 的默认寻址模式，它要求 RISC-V 64位处理器支持寻址掩码功能，对硬件设计提出了新的要求。我们在 QEMU 上实验该功能，并证明了基于松弛扩展寻址模式的 RV64ILP32 工具链的有效性。 + +## 新32位内核 + +新32位工具链基于 RISC-V 64ilp32 ABI，融合了松弛扩展寻址技术，让64位硬件流畅运行新32位软件。我们在 qemu 上实现了硬件松弛扩展寻址模式，并用新工具链构建了**业内首款新32位Linux内核**。 + +与传统32位对比，尽管新32位和传统32位都是32位Linux操作系统软件，但新32位得益于64位指令集，其性能显著优于传统32位： + +![pic3.jpg](/news-images/pic3.jpg) + +如上图所示，新32位内核的 iperf3-tcp 测试大幅领先，在软件 ABI 相同的情况下，使用 64 位指令架构能极大提升操作系统的性能。本次qemu 测试仅供参考，请联系硬件供应商获得真实的性能差距报告，本测试用例已在工具链发布包内，请大家直接下载自行体验，动画测试的全过程见下方链接： + +https://mp.weixin.qq.com/s/argIGP4_rUKDm9IRIB-YTg + +与传统64位对比，Fedora 团队完成了 RISC-V 新32位在 k230 硬件平台的适配，新32位避免了39%的内存浪费，其成本优势使 Fedora RISC-V 能在嵌入式领域有更广泛的应用，具体请参考： + +https://fedoraproject.org/wiki/Architectures/RISC-V/64ILP32 + + + +![pic4.jpg](/news-images/pic4.jpg) + + + +![pic5.jpg](/news-images/pic5.jpg) + +## 新32位工具链 + +让32位软件运行在64位硬件上不仅更快而且更省，这正是我们新32位编译器的优势所在，不禁让人想起中国古代田忌赛马的故事，与传统32位比性能，与传统64位比成本。换言之，新32位就是要取代传统32位，与64位形成互补。在进一步的测试中，我们观察到了传统32位的明显不足： + +![pic6.jpg](/news-images/pic6.jpg) + +如上图所示，在处理长数据类型时，传统32位的编译器生成了超过10条额外指令来操作保存的变量。相反，当采用新32位工具链时，编译器会直接利用64位指令来处理这些数据，大幅度减少了所需指令的数量。 + + + +![pic7.jpg](/news-images/pic7.jpg) + +**本次发布的新32位工具链通过了33万个测试用例，其中包含 192133 个 g++ 用例, 与 143498 个 gcc 用例 ，全面覆盖编译器的各项功能，测试结果与 GCC13 release 保持一致，达到产品级质量要求。相比传统32位，它的优势如下：** + +● **更强大的性能：** 新32位编译器在处理长数据类型时更加高效，因为它无需进行额外的寄存器拼接或零扩展操作。这可以显著减少指令数量，提高程序的执行效率，特别是在涉及大量长数据类型操作的情况下。 + +● **更好的兼容性：** 新32位编译器可以与传统64位编译器兼容，因为它们基于相同的硬件指令集。这意味着开发者可以更轻松地将现有的64位汇编代码迁移到新32位平台上，而无需做出太多修改。 + +● **更多的扩展性：** 随着技术的发展和需求的增长，对更大的内存空间和更高性能的需求也在不断增加。新32位的硬件平台可以为未来的扩展性提供了更好的支持，因为它能无缝切换到传统64位以满足更高要求的应用程序。 + +● **产品级的质量：**新32位工具链经过大量测试验证，保证使用的正确性与稳定性，同时在RUYISDK开源仓库中进行维护更新，及时解决用户遇到的各种问题。 + + + +快速上手：https://github.com/ruyisdk/riscv-gnu-toolchain-rv64ilp32/ + +技术支持：https://github.com/ruyisdk/riscv-gnu-toolchain-rv64ilp32/issues/ + + + +## 结束语 + +松弛扩展寻址技术在新**32**位工具链中扮演着关键角色，为嵌入式系统的开发和部署提供了全新的解决方案。作为**业内首款基于松弛扩展寻址技术的新32位产品级开源工具链和Linux内核**，标志着嵌入式系统开发领域的一次重要创新。我们热切期待开发者们积极参与到新32位的开发和完善中，共同提出宝贵的建议和意见，推动新32位不断发展。我们致力于建立一个健康和活跃的开源社区，将持续投入资源和精力，确保新32位的稳定性和可靠性，并不断改进和完善其功能和性能。在此，我们也呼吁更多的硬件厂商加入我们的阵营，共同推动新32位嵌入式系统的发展和创新，为行业带来更多的可能性和机遇。 + +### 相关阅读 + +● [rv64ilp32: The future of the 32-bit Linux](https://mp.weixin.qq.com/s/XTX_jUYzirDQVXaHHR8i1Q) + +### 关于我们 + +●**PLCT GNU**小队是专注**GNU**工具链开发的团队，目前致力于维护**GNU RISC-V**后端支持工作，包括草案支持及性能优化。作为开源社区的积极贡献者，我们矢志不渝地推动**RISC-V**架构在**GNU**工具链中的广泛应用与性能提升，欢迎交流合作。 + +● 达摩院玄铁团队持续深耕**RISC-V**技术研发及生态建设，并陆续推出了一系列玄铁处理器，可满足高中低全系列性能需求。玄铁积极拥抱开源，坚持开放创新，已逐渐构建起以**RISC-V**为核心的生态体系，与生态伙伴协同推动**RISC-V**芯片、开发工具、操作系统、应用解决方案等不同层面的软硬一体化发展。全力推动**RISC-V**软硬全栈技术多领域发展落地，加速实现智能时代的万物互联! \ No newline at end of file diff --git a/content/zh/news/003.md b/content/zh/news/003.md new file mode 100644 index 0000000..499a4d8 --- /dev/null +++ b/content/zh/news/003.md @@ -0,0 +1,39 @@ ++++ +title = '喜讯｜祝贺陈逸轩完成RISC-V国际基金会 RISC-V Advocate 首批认证：全球共4位、唯一女性代表、唯一东亚代表' +date = 2024-03-17 ++++ + +围观地址：https://riscv.org/risc-v-advocates/ + +![pic8.jpg](/news-images/pic8.jpg) + +我们怀着非常激动的心情与所有PLCT实验室的伙伴和支持者分享一个好消息：来自中国科学院软件研究所**PLCT**实验室**GNU工具链小队**的编译器工程师**陈逸轩**同学，经过了10个月的训练和等待，终于通过了RISC-V国际基金会认证，成为首批4名公布的 **RISC-V Advocate（RISC-V倡导者）**，她是目前全球唯一获得认证的女性工程师，也是唯一的东亚面孔。 + +陈逸轩工程师同时兼任**PLCT**实验室武汉办公室主任、并且在（由邱吉博士发起的面向女性编译器工程师职业提升的）**南盘江计划**中担任活跃组织者。她在职业生涯伊始就参与了开源软件社区的贡献，并于**2022**年初加入**PLCT**实验室，成为一名为**RISC-V**开源软件生态的开拓者。 + +目前陈逸轩工程师所在的GNU工具链小队正在招募GCC编译器开发实习生，欢迎在GitHub 上搜索 **plctlab/weloveinterns** 获取最新全面的PLCT实验室招聘信息。 + +**让荣光落于刀锋之上！** + +![pic9.jpg](/news-images/pic9.jpg) + +以下是RISC-V倡导者的介绍（来自于 https://riscv.org/risc-v-advocates/ 内容为机器翻译，请忽略错误） + +RISC-V 倡导者通过全球推广和参与来支持 RISC-V 的进步。 + +倡导者是 RISC-V 爱好者，他们与 RISC-V International 合作，确保全球势头和采用。 成功的倡导者包括工程专业的学生和早期采用者，他们热衷于与社区分享他们对 RISC-V 的知识和热爱。 + +该计划将于 2024 年正式启动，需要每年提交申请，并详细了解您如何获得资格。 2024 年计划的申请现已开放，将于 2024 年 2 月 29 日截止。被接受加入该计划的个人将于 2024 年 3 月 15 日收到通知。该计划按日历年运行。 + +RISC-V 倡导者是对 RISC-V 充满热情并致力于发展和参与 RISC-V 社区的个人。 RISC-V 倡导者计划为社区成员提供工具和资源，以： + +- 扩大他们在 RISC-V 工作中的作用 +- 对当地社区进行 RISC-V 使命和技术方面的教育 +- 吸引 RISC-V 成员参与和社区发展 +- 倡导者的特质：热衷于分享他们对 RISC-V 的知识和热爱。 能够让其他人参与当地社区并通过直接贡献支持生态系统。 + +RISC-V Advocates support RISC-V progress through global promotion and engagement. See requirements to apply below, please **apply here by February, 29 2024**. + +**RISC-V Advocates are individuals passionate about RISC-V and dedicated to growing and engaging the RISC-V community.** + +Questions? Reach out to local (at) riscv (dot) org \ No newline at end of file diff --git a/content/zh/news/004.md b/content/zh/news/004.md new file mode 100644 index 0000000..392d18b --- /dev/null +++ b/content/zh/news/004.md @@ -0,0 +1,32 @@ ++++ +title = '内测邀请：RuyiSDK官方网站即将正式上线' +date = 2024-03-18 ++++ + + +![pic10.jpg](/news-images/pic10.jpg) + +我们很高兴地宣布，RuyiSDK的全新官方网站即将上线！这是我们的一个重要里程碑，我们诚邀您成为我们测试的一部分。 + +RuyiSDK一直致力于提供最前沿的RISC-V软件开发工具和服务，我们的新网站将进一步提升您的用户体验。在正式发布之前，我们希望通过您的参与来完善网站功能，确保一切运行顺畅。**测试参与者可以：** + +- 提前体验网站的最新功能 +- 对网站的未来发展提出建议和反馈 + +**测试时间：** 2024年3月15日至4月1日 + +**如何参与：** 请访问我们的测试页面 ruyisdk.org 开始体验。您的每一条反馈都是对我们至关重要的支持。我们期待着您的宝贵意见，一起打造更好的RuyiSDK。 + + + +**联系方式：** 如有任何疑问，请通过以下方式联系我们： + +- 微信公众号：ruyisdk + +- Github Issues: https://github.com/ruyisdk/ruyisdk-website/issues + +- Github Discussions: https://github.com/ruyisdk/ruyisdk-website/discussions + + + + 感谢您的支持！RuyiSDK团队 \ No newline at end of file diff --git a/content/zh/news/_index.md b/content/zh/news/_index.md new file mode 100644 index 0000000..77c28ba --- /dev/null +++ b/content/zh/news/_index.md @@ -0,0 +1,5 @@ +--- +title: News +summary: This is our recently news. +description: Explore some of recent posts. +--- \ No newline at end of file diff --git a/i18n/en.toml b/i18n/en.toml new file mode 100644 index 0000000..198ad25 --- /dev/null +++ b/i18n/en.toml @@ -0,0 +1,2 @@ +founder = 'PLCT Lab founder - Wu Wei' +view = 'View All' \ No newline at end of file diff --git a/i18n/ja.toml b/i18n/ja.toml new file mode 100644 index 0000000..6b1278c --- /dev/null +++ b/i18n/ja.toml @@ -0,0 +1,2 @@ +founder = 'PLCT Lab 創設者 - Wu Wei' +view = 'すべて見る' \ No newline at end of file diff --git a/i18n/ko.toml b/i18n/ko.toml new file mode 100644 index 0000000..b9b91a3 --- /dev/null +++ b/i18n/ko.toml @@ -0,0 +1,2 @@ +founder = 'PLCT 연구소 설립자 - Wu Wei' +view = '모두보기' \ No newline at end of file diff --git a/i18n/ru.toml b/i18n/ru.toml new file mode 100644 index 0000000..d7c896e --- /dev/null +++ b/i18n/ru.toml @@ -0,0 +1,2 @@ +founder = 'Основатель PLCT Lab – У Вэй' +view = 'Посмотреть все' \ No newline at end of file diff --git a/i18n/zh.toml b/i18n/zh.toml new file mode 100644 index 0000000..2507bb8 --- /dev/null +++ b/i18n/zh.toml @@ -0,0 +1,2 @@ +founder = 'PLCT Lab 创始人 - 吴伟' +view = '查看全部' \ No newline at end of file diff --git a/themes/hugo-liftoff b/themes/hugo-liftoff index 78f26a6..5e09f3b 160000 --- a/themes/hugo-liftoff +++ b/themes/hugo-liftoff @@ -1 +1 @@ -Subproject commit 78f26a6cd1f7e495955dbd9214a4d70bd65dd631 +Subproject commit 5e09f3b567b1a5a3ccbca62ec3d457c4538547bd