Merged mss-spi source code version 2.1.102.

driver-examples/mss/mss-spi/mpfs-spi-flash/.cproject

@@ -299,10 +299,15 @@
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+									<listOptionValue builtIn="false" value="NDEBUG"/>
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+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.defs.1809767938" name="Defined symbols (-D)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.defs" useByScannerDiscovery="true" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="NDEBUG"/>
+								</option>
 								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.paths.1677881098" name="Include paths (-I)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.paths" useByScannerDiscovery="true" valueType="includePath">
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 									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/src/platform}&quot;"/>
@@ -420,10 +425,15 @@
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+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.defs.1232681309" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.defs" useByScannerDiscovery="true" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="NDEBUG"/>
+								</option>
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driver-examples/mss/mss-spi/mpfs-spi-flash/README.md

@@ -2,23 +2,28 @@
 
 This example project demonstrates the use of the PolarFire MSS SPI hardware
 block. It reads and writes the content of an external SPI flash device. The 
-PolarFire SoC is configured as a master and SPI Flash acts as a slave for this 
-particular example project.
+PolarFire SoC MSS SPI1 is configured as a master and SPI Flash acts as a slave.
+The **(Micron MT25Q)** device available on the Mikrobus click board "MT25QL01GBBB"
+connected on the MikroBus socket on Icicle kit was used to test this example project.
 
 # How to use this example
 
-**NOTE:** This project can not be directly used on the Icicle kit since the 
-flash memory device is not accessible via SPI.This example project is provided
-as reference to demonstrate how to use the MSS SPI driver for accessing SPI Flash. 
+On connecting Icicle kit J11 to the host PC, you should see 4 COM port interfaces
+connected. To use this project configure the COM port **interface1** as below:
 
-The example project is targeted to PolarFire SoC hardware platform. The SPI0 is 
-configured in master mode whereas SPI flash is the slave. The data is then 
-transferred between SPI0 and SPI Flash.
-Run the example project using a debugger. Place watches on buffers
-g_flash_wr_buf and g_flash_rd_buf. You will then be able to observe the content
-of g_flash_wr_buf being written into external flash and read back into the
-g_flash_rd_buf buffer.
+ - 115200 baud
+ - 8 data bits
+ - 1 stop bit
+ - no parity
+ - no flow control
 
+The example project is targeted to PolarFire SoC hardware platform. This is a self
+contained example project. A greeting message is displayed over the UART terminal.
+
+It configures the MSS SPI1 as master and the flash memory in the normal SPI mode
+and does the write, read operations on it in that sequence. It then cross-checks
+the content read from the memory with the contents that were written to it. A pass
+or fail message is displayed as per the results.
 
 This project provides build configurations and debug launchers as explained
 [here](https://mi-v-ecosystem.github.io/redirects/repo-polarfire-soc-bare-metal-examples)

driver-examples/mss/mss-spi/mpfs-spi-flash/mpfs-spi-flash hw all-harts debug.launch

@@ -1,6 +1,6 @@
 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
 <launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType">
-    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="false"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="true"/>
     <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doDebugInRam" value="false"/>
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driver-examples/mss/mss-spi/mpfs-spi-flash/src/application/hart0/e51.c

@@ -1,14 +1,20 @@
 /*******************************************************************************
- * Copyright 2019-2021 Microchip FPGA Embedded Systems Solutions.
+ * Copyright 2019 Microchip FPGA Embedded Systems Solutions.
  *
  * SPDX-License-Identifier: MIT
  *
- * Application code running on E51
+ * @file e51.c
+ *
+ * @author Microchip FPGA Embedded Systems Solutions
+ *
+ * @brief Application code running on E51
+ *
  */
 
 #include <stdio.h>
 #include <string.h>
 #include "mpfs_hal/mss_hal.h"
+#include "drivers/mss/mss_mmuart/mss_uart.h"
 
 volatile uint32_t count_sw_ints_h0 = 0U;
 
@@ -32,12 +38,21 @@ void e51(void)
     clear_soft_interrupt();
     set_csr(mie, MIP_MSIP);
 
+    (void)mss_config_clk_rst(MSS_PERIPH_MMUART0, (uint8_t) MPFS_HAL_FIRST_HART, PERIPHERAL_ON);
+
+    MSS_UART_init( &g_mss_uart0_lo,
+            MSS_UART_115200_BAUD,
+            MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT);
+
+    MSS_UART_polled_tx_string(&g_mss_uart0_lo ,
+            (const uint8_t*)"\r\nThis message is from E51.\
+            \r\nApplication will execute from U54_1.\r\n");
+
 #if (IMAGE_LOADED_BY_BOOTLOADER == 0)
 
     /* Raise software interrupt to wake hart 1 */
 
     raise_soft_interrupt(1U);
-
 #endif
 
     __enable_irq();

driver-examples/mss/mss-spi/mpfs-spi-flash/src/application/hart1/u54_1.c

@@ -1,19 +1,25 @@
-/**************************************************************************//**
- * Copyright 2019-2021 Microchip FPGA Embedded Systems Solutions.
+/******************************************************************************
+ * Copyright 2019 Microchip FPGA Embedded Systems Solutions.
  *
  * SPDX-License-Identifier: MIT
  *
- * Application code running on U54.
+ * @file u54_1.c
+ *
+ * @author Microchip FPGA Embedded Systems Solutions
+ *
+ * @brief Application code running on U54_1.
  *
  * This example project demonstrates the use of the PolarFire MSS SPI hardware
  * block. It reads and writes the content of an external SPI flash device.
+ *
  */
 
 #include <stdint.h>
 #include <string.h>
 #include "mpfs_hal/mss_hal.h"
 #include "drivers/mss/mss_spi/mss_spi.h"
 #include "drivers/off-chip/mt25ql01gbbb/mt25ql01gbbb.h"
+#include "drivers/mss/mss_mmuart/mss_uart.h"
 
 #define BUFFER_SIZE                     3000U
 
@@ -29,6 +35,23 @@ static uint8_t g_flash_rd_buf[BUFFER_SIZE];
 static uint8_t verify_write(uint8_t* write_buff, uint8_t* read_buff, uint16_t size);
 static void mss_spi_overflow_handler(uint8_t mss_spi_core);
 
+uint8_t g_message[] =
+"\r\n\r\n\
+*******************  PolarFire SoC MSS SPI Example Project ********************\r\n\
+\r\n\r\n";
+
+uint8_t g_message1[] =
+"\r\n\r\n\
+Write-Read test on the SPI flash successful\r\n\
+\r\n\r\n\
+Data stored in g_flash_rd_buf is identical from the data stored in g_flash_wr_buf";
+
+uint8_t g_message2[] =
+"\r\n\r\n\
+Write-Read test on the SPI flash failed\r\n\
+\r\n\r\n\
+Data stored in g_flash_rd_buf is different from the data stored in g_flash_wr_buf";
+
 /**************************************************************************//**
  * Main Function
  */
@@ -43,6 +66,9 @@ void u54_1(void)
 
 #if (IMAGE_LOADED_BY_BOOTLOADER == 0)
 
+    clear_soft_interrupt();
+    set_csr(mie, MIP_MSIP);
+
     /*Put this hart into WFI.*/
 
     do
@@ -55,7 +81,14 @@ void u54_1(void)
     clear_soft_interrupt();
 #endif
 
-    SYSREG->SOFT_RESET_CR &= ~(0x01UL << 10U);
+    (void)mss_config_clk_rst(MSS_PERIPH_SPI1, (uint8_t) MPFS_HAL_FIRST_HART, PERIPHERAL_ON);
+    (void)mss_config_clk_rst(MSS_PERIPH_MMUART1, (uint8_t) MPFS_HAL_FIRST_HART, PERIPHERAL_ON);
+
+    MSS_UART_init(&g_mss_uart1_lo,
+                  MSS_UART_115200_BAUD,
+                  MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT);
+
+    MSS_UART_polled_tx(&g_mss_uart1_lo,g_message,sizeof(g_message));
 
 /**************************************************************************//**
  * Initialize write and read buffers
@@ -76,16 +109,16 @@ void u54_1(void)
  * Flash Driver Initialization
  */
 
-    FLASH_init(&g_mss_spi0_lo, mss_spi_overflow_handler);
+    FLASH_init(&g_mss_spi1_lo, mss_spi_overflow_handler);
 
-    FLASH_global_unprotect(&g_mss_spi0_lo);
+    FLASH_global_unprotect(&g_mss_spi1_lo);
 
-    FLASH_erase_64k_block(&g_mss_spi0_lo, 0U);
+    FLASH_erase_64k_block(&g_mss_spi1_lo, 0U);
 
 /**************************************************************************//**
  * Check SPI Flash part manufacturer and device ID.
  */
-    FLASH_read_device_id(&g_mss_spi0_lo, &manufacturer_id, &device_id);
+    FLASH_read_device_id(&g_mss_spi1_lo, &manufacturer_id, &device_id);
     if((FLASH_MANUFACTURER_ID != manufacturer_id) || (FLASH_DEVICE_ID != device_id))
     {
         ++errors;
@@ -95,14 +128,23 @@ void u54_1(void)
  * Write Data to Flash.
  */
     address = 200U;
-    FLASH_program(&g_mss_spi0_lo, address, g_flash_wr_buf, sizeof(g_flash_wr_buf));
+    FLASH_program(&g_mss_spi1_lo, address, g_flash_wr_buf, sizeof(g_flash_wr_buf));
 
     /* Read Data From Flash */
     address = 200U;
-    FLASH_read(&g_mss_spi0_lo, address, g_flash_rd_buf, sizeof(g_flash_wr_buf));
+    FLASH_read(&g_mss_spi1_lo, address, g_flash_rd_buf, sizeof(g_flash_wr_buf));
 
     errors = verify_write(g_flash_rd_buf, g_flash_wr_buf, sizeof(g_flash_wr_buf));
 
+    if (0 == errors)
+    {
+       MSS_UART_polled_tx(&g_mss_uart1_lo,g_message1,sizeof(g_message1));
+    }
+    else
+    {
+       MSS_UART_polled_tx(&g_mss_uart1_lo,g_message2,sizeof(g_message2));
+    }
+
     while(1U)
     {
         ;
@@ -139,14 +181,15 @@ static void mss_spi_overflow_handler(uint8_t mss_spi_core)
     if (mss_spi_core)
     {
         /* reset SPI1 */
+        (void)mss_config_clk_rst(MSS_PERIPH_SPI1, (uint8_t) MPFS_HAL_FIRST_HART, PERIPHERAL_OFF);
         /* Take SPI1 out of reset. */
         (void)mss_config_clk_rst(MSS_PERIPH_SPI1, (uint8_t) MPFS_HAL_FIRST_HART, PERIPHERAL_ON);
 
     }
     else
     {
         /* reset SPI0 */
-
+        (void)mss_config_clk_rst(MSS_PERIPH_SPI0, (uint8_t) MPFS_HAL_FIRST_HART, PERIPHERAL_OFF);
          /* Take SPI0 out of reset. */
         (void)mss_config_clk_rst(MSS_PERIPH_SPI0, (uint8_t) MPFS_HAL_FIRST_HART, PERIPHERAL_ON);
     }

driver-examples/mss/mss-spi/mpfs-spi-flash/src/application/hart2/u54_2.c

@@ -1,9 +1,14 @@
 /*******************************************************************************
- * Copyright 2019-2021 Microchip FPGA Embedded Systems Solutions.
+ * Copyright 2019 Microchip FPGA Embedded Systems Solutions.
  *
  * SPDX-License-Identifier: MIT
  *
- * Application code running on U54_2
+ * @file u54_2.c
+ *
+ * @author Microchip FPGA Embedded Systems Solutions
+ *
+ * @brief Application code running on U54_2
+ *
  */
 
 #include <stdio.h>

driver-examples/mss/mss-spi/mpfs-spi-flash/src/application/hart3/u54_3.c

@@ -1,9 +1,14 @@
 /*******************************************************************************
- * Copyright 2019-2021 Microchip FPGA Embedded Systems Solutions.
+ * Copyright 2019 Microchip FPGA Embedded Systems Solutions.
  *
  * SPDX-License-Identifier: MIT
  *
- * Application code running on U54_3
+ * @file u54_3.c
+ *
+ * @author Microchip FPGA Embedded Systems Solutions
+ *
+ * @brief Application code running on U54_3
+ *
  */
 
 #include <stdio.h>

driver-examples/mss/mss-spi/mpfs-spi-flash/src/application/hart4/u54_4.c

@@ -1,9 +1,14 @@
 /*******************************************************************************
- * Copyright 2019-2021 Microchip FPGA Embedded Systems Solutions.
+ * Copyright 2019 Microchip FPGA Embedded Systems Solutions.
  *
  * SPDX-License-Identifier: MIT
  *
- * Application code running on U54_4
+ * @file u54_4.c
+ *
+ * @author Microchip FPGA Embedded Systems Solutions
+ *
+ * @brief Application code running on U54_4
+ *
  */
 
 #include <stdio.h>

driver-examples/mss/mss-spi/mpfs-spi-flash/src/application/inc/common.h

@@ -1,6 +1,11 @@
-/*************************************************************************//**
- * Copyright 2019-2020 Microchip FPGA Embedded Systems Solutions.
- * common.h
+/*****************************************************************************
+ * Copyright 2019 Microchip FPGA Embedded Systems Solutions.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * @file common.h
+ *
+ * @author Microchip FPGA Embedded Systems Solutions
  *
  */
 

driver-examples/mss/mss-spi/mpfs-spi-flash/src/boards/icicle-kit-es/platform_config/mpfs_hal_config/mss_sw_config.h

@@ -1,9 +1,13 @@
 /*******************************************************************************
- * Copyright 2019-2022 Microchip FPGA Embedded Systems Solutions.
+ * Copyright 2019 Microchip FPGA Embedded Systems Solutions.
  *
  * SPDX-License-Identifier: MIT
  *
- * MPFS HAL Embedded Software
+ * @file mss_sw_config.h
+ *
+ * @author Microchip FPGA Embedded Systems Solutions
+ *
+ * @brief MPFS HAL Embedded Software
  *
  */