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booting-from-qspi.md

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Booting from an external QSPI flash memory device

Table of Contents

Introduction

This document provides a brief overview of programming an external QSPI Flash memory connected to the MSS QSPI peripheral.

Requirements

The following flash memory devices are officially supported on PolarFire SoC:

Manufacturer Part No. Type Density
Winbond W25N01GV NAND 1Gb (128MB)
Micron* MT25QL256 NOR 256Mb (32MB)

*Micron QSPI is only supported in the Meta PolarFire SoC Yocto BSP and Microchip Buildroot External.

Depending on the PolarFire SoC board being used the QSPI I/Os may be routed via the FPGA fabric to a Raspberry Pi interface, in this case an adapter daughter board may be required to connect a QSPI flash. See the individual sections below for more information.

Tested on

The steps outlined below have been tested with the supported memories mentioned above on the PolarFire SoC Icicle Kit.

The Icicle Kit Reference Design routes QSPI I/O through the FPGA fabric which means either a Pi 3 Click Shield or a PMOD HAT Adapter will also required depending on the interface of the memory. See the individual sections below for more infomation.

Pre-Requisites

Hart Software Services Configuration

From release v2022.09 the HSS will no longer support booting from QSPI in the default build. This means that the configuration option SERVICE_QSPI must be enabled in the HSS configuration to boot from QSPI flash.

  • If the Winbond W25N01GV QSPI flash is being used SERVICE_QSPI_WINBOND_W25N01GV must also be enabled in the build.

    • The HSS includes an example configuration file in the boards/mpfs-icicle-kit-es/def_config_examples/ directory called def_config_emmc_qspi-winbond with the Winbond QSPI flash enabled.

  • If the Micron MQ25T QSPI flash is being used SERVICE_QSPI_MICRON_MQ25T must also be enabled in the build.

    • The HSS includes an example configuration file in the boards/mpfs-icicle-kit-es/def_config_examples/ directory called def_config_emmc_qspi-micron with the Micron QSPI flash enabled.

Note: if you are using a reference design job file for a development kit, these job files bundle a HSS eNVM client. This means you must first program the FPGA job to the target board and then update the HSS using the boot mode programmer in SoftConsole. Alternatively the FPGA design can be generated in Libero SoC and a custom HSS build added as an eNVM client in the Libero design flow. For more information refer to the PolarFire SoC Software Tool Flow documentation.

Using a Winbond W25N01GV NAND flash memory

Ensure you are using:

  • Icicle Kit reference design v2022.09 or later with the standard configuration.
  • A HSS built with SERVICE_QSPI and SERVICE_QSPI_WINBOND_W25N01GV enabled or built using the def_config_emmc_qspi-winbond configuration file.

The Winbond W25N01GV NAND flash memory can be connected to the Icicle Kit by using a Mikroe Flash 5 click board and a Pi 3 Click shield as follows:

  • Connect the Flash 5 Click board to slot 1 on the Pi 3 click shield

  • Connect the Pi 3 click shield to the Icicle Kit using the Raspberry PI 4 Interface (J26)

  • Make sure J46 jumper is closed on the Icicle Kit

Using a Micron MT25QL256 NOR flash memory

Ensure you are using:

  • Icicle Kit reference design v2022.09 or later with the "MICRON_QSPI" configuration.
  • A HSS built with SERVICE_QSPI and SERVICE_QSPI_MICRON_MQ25T enabled or built using the def_config_emmc_qspi-micron configuration file..

The Micron MT25QL256 NOR flash memory can be connected to the Icicle Kit by using a Digilent Pmod SF3 and a Pmod HAT Adapter as follows:

  • Connect the Pmod SF3 to slot JA on the Pmod HAT adapter

  • Connect the Pmod HAT adapter to the Icicle Kit using the Raspberry PI 4 Interface (J26)

  • Make sure J46 jumper is closed on the Icicle Kit

Building a Linux image for a NAND or NOR flash memory device

The Microchip PolarFire SoC Yocto BSP layer and Microchip Buildroot External allow users to build a minimal Linux image that can be programmed to the officially supported NAND and NOR flash memory devices.

Linux images created using the PolarFire SoC Yocto BSP layer and named per the <image>-<machine>-<timestamp>.<flash-type>.mtdimg format, for example, core-image-minimal-mtdutils-icicle-kit-es-yyyyMMddHHmmSS.nand.mtdimg or core-image-minimal-mtdutils-icicle-kit-es-yyyyMMddHHmmSS.nor.mtdimg are suitable for programming to a QSPI flash device using the HSS. For Microchip Buildroot External, images with the name nand.img or nor.img are used instead.

Programming the external QSPI flash memory using the HSS

The Hart Software Services (HSS) can be used to:

  • Write a HSS payload or Linux image to the officially supported QSPI flash memory devices
  • Boot from QSPI by reading a HSS payload located in the QSPI flash memory

Using USBDMSC service

An external QSPI flash memory can be programmed using the HSS's USBDMSC service. For more information on how to program a Linux image to a QSPI flash memory please refer to the Updating a PolarFire SoC FPGA Design and Linux Image documentation.

Boot Sequence

The HSS will attempt to initialize the QSPI flash memory device. If no flash memory is connected, the HSS will attempt to initialize the SD card. If no card is inserted, the HSS will attempt to initialize the eMMC.

If a valid payload is found in any of the boot sources mentioned above, its contents will be unpacked into its destination memory (LIM, DDR, fabric memory etc) and owner U54 harts will be taken out of WFI to run the payload.