I2C and SPI Loopback Tests Combined -- Issue

[sashapapo-mchp]

Hi,

I am using the Icicle Kit Evaluation board.

I have taken the DDR, I2C Loopback and SPI Loopback. The E51 is running the DDR tests, the U54_1 is running the I2C loopback and the U54_2 is running the SPI loopback.

These tests are running as expected and each of them can run independently with no issues.

However, when I try to run the I2C and SPI loopback tests at the same time (in a continuous loop) there is an issue with the I2C bus. It seems that the SPI transaction causes the I2C transaction to either fail with a bad read (NAK) or timeout. In the case where the timeout happens, the bus is unrecoverable without a reset.

Each core is using its own UART for debugging.

I2C is always the transaction that fails, SPI never seems to fail in this way.
I've tried adjusting the priorities and reducing the UART output that is happening and this has had no effect on the issue.

During my testing, I've captured a sample waveform when the SPI clock initiates there are glitches in my SDA signal.

What could cause contention between these two peripherals?'

Thanks