Design files for a virtual link
Top level design file Top level creating the transmitter - channel - reciever chain
VLINK Virtual link
FIR Finite Impulse Response : perfroms a filtering of digital quantized numbers
LFSR Logic feedback shift register : generates a random stream used for scrambling / descrambling purpose
PRBS Pseudo Random Bit Stream : generates and recieves a random bits stream and supports sequence error detection
PSK Phase shift keying : perfrom (currently) the BPSK modulation and demodulation
SEI Systematic Error Insertion : systematically inserts a bit error in the incoming stream