diff --git a/detailed_mem/module.axi_to_detailed_mem.html b/detailed_mem/module.axi_to_detailed_mem.html index b754ae513..3fc27c91e 100644 --- a/detailed_mem/module.axi_to_detailed_mem.html +++ b/detailed_mem/module.axi_to_detailed_mem.html @@ -53,38 +53,42 @@

clk_iaxi_resp_o: output axi_resp_t

AXI4+ATOP slave port, response output.

-

mem_req_o: output logic [NumBanks-1:0]

mem_req_o: output logic [NumBanks-1:0]

Memory stream master, request is valid for this bank.

-

mem_gnt_i: input logic [NumBanks-1:0]

mem_gnt_i: input logic [NumBanks-1:0]

Memory stream master, request can be granted by this bank.

-

mem_addr_o: output addr_t [NumBanks-1:0]

mem_addr_o: output addr_t [NumBanks-1:0]

Memory stream master, byte address of the request.

-

mem_wdata_o: output mem_data_t [NumBanks-1:0]

mem_wdata_o: output mem_data_t [NumBanks-1:0]

Memory stream master, write data for this bank. Valid when mem_req_o.

-

mem_strb_o: output mem_strb_t [NumBanks-1:0]

mem_strb_o: output mem_strb_t [NumBanks-1:0]

Memory stream master, byte-wise strobe (byte enable).

-

mem_atop_o: output axi_pkg::atop_t [NumBanks-1:0]

mem_atop_o: output axi_pkg::atop_t [NumBanks-1:0]

Memory stream master, axi_pkg::atop_t signal associated with this request.

-

mem_lock_o: output logic [NumBanks-1:0]

mem_lock_o: output logic [NumBanks-1:0]

Memory stream master, lock signal.

-

mem_we_o: output logic [NumBanks-1:0]

mem_we_o: output logic [NumBanks-1:0]

Memory stream master, write enable. Then asserted store of mem_w_data is requested.

-

mem_id_o: output mem_id_t [NumBanks-1:0]

mem_id_o: output mem_id_t [NumBanks-1:0]

Memory stream master, ID. Response ID is managed internally, ensure in-order responses.

-

mem_user_o: output mem_user_t [NumBanks-1:0]

mem_user_o: output mem_user_t [NumBanks-1:0]

Memory stream master, user signal. Ax channel user bits used.

-

mem_cache_o: output axi_pkg::cache_t [NumBanks-1:0]

mem_cache_o: output axi_pkg::cache_t [NumBanks-1:0]

Memory stream master, cache signal.

-

mem_prot_o: output axi_pkg::prot_t [NumBanks-1:0]

mem_prot_o: output axi_pkg::prot_t [NumBanks-1:0]

Memory stream master, protection signal.

-

mem_rvalid_i: input logic [NumBanks-1:0]

mem_qos_o: output axi_pkg::qos_t [NumBanks-1:0]

Memory stream master, QOS signal.

+

mem_region_o: output axi_pkg::region_t [NumBanks-1:0]

Memory stream master, region signal.

+

mem_rvalid_i: input logic [NumBanks-1:0]

Memory stream master, response is valid. This module expects always a response valid for a request regardless if the request was a write or a read.

-

mem_rdata_i: input mem_data_t [NumBanks-1:0]

mem_rdata_i: input mem_data_t [NumBanks-1:0]

Memory stream master, read response data.

-

mem_err_i: input logic [NumBanks-1:0]

mem_err_i: input logic [NumBanks-1:0]

Memory stream master, error response.

-

mem_exokay_i: input logic [NumBanks-1:0]

mem_exokay_i: input logic [NumBanks-1:0]

Memory stream master, read response exclusive access OK.

Types

diff --git a/detailed_mem/module.axi_to_detailed_mem_intf.html b/detailed_mem/module.axi_to_detailed_mem_intf.html index ce3a1c397..250a60471 100644 --- a/detailed_mem/module.axi_to_detailed_mem_intf.html +++ b/detailed_mem/module.axi_to_detailed_mem_intf.html @@ -39,33 +39,41 @@

clk_islv: AXI_BUS.Slave

AXI4+ATOP slave interface port.

-

mem_req_o: output logic [NUM_BANKS-1:0]

mem_req_o: output logic [NUM_BANKS-1:0]

See axi_to_mem, port mem_req_o.

-

mem_gnt_i: input logic [NUM_BANKS-1:0]

mem_gnt_i: input logic [NUM_BANKS-1:0]

See axi_to_mem, port mem_gnt_i.

-

mem_addr_o: output addr_t [NUM_BANKS-1:0]

mem_addr_o: output addr_t [NUM_BANKS-1:0]

See axi_to_mem, port mem_addr_o.

-

mem_wdata_o: output mem_data_t [NUM_BANKS-1:0]

mem_wdata_o: output mem_data_t [NUM_BANKS-1:0]

See axi_to_mem, port mem_wdata_o.

-

mem_strb_o: output mem_strb_t [NUM_BANKS-1:0]

mem_strb_o: output mem_strb_t [NUM_BANKS-1:0]

See axi_to_mem, port mem_strb_o.

-

mem_atop_o: output axi_pkg::atop_t [NUM_BANKS-1:0]

mem_atop_o: output axi_pkg::atop_t [NUM_BANKS-1:0]

See axi_to_mem, port mem_atop_o.

-

mem_lock_o: output logic [NUM_BANKS-1:0]

mem_lock_o: output logic [NUM_BANKS-1:0]

See axi_to_mem, port mem_lock_o.

-

mem_we_o: output logic [NUM_BANKS-1:0]

mem_we_o: output logic [NUM_BANKS-1:0]

See axi_to_mem, port mem_we_o.

-

mem_id_o: output logic [NUM_BANKS-1:0]

mem_id_o: output logic [NUM_BANKS-1:0]

See axi_to_mem, port mem_id_o.

-

mem_user_o: output logic [NUM_BANKS-1:0]

mem_user_o: output logic [NUM_BANKS-1:0]

See axi_to_mem, port mem_user_o.

-

mem_rvalid_i: input logic [NUM_BANKS-1:0]

mem_cache_o: output axi_pkg::cache_t [NUM_BANKS-1:0]

See axi_to_mem, port mem_cache_o.

+

mem_prot_o: output axi_pkg::prot_t [NUM_BANKS-1:0]

See axi_to_mem, port mem_prot_o.

+

mem_qos_o: output axi_pkg::qos_t [NUM_BANKS-1:0]

See axi_to_mem, port mem_qos_o.

+

mem_region_o: output axi_pkg::region_t [NUM_BANKS-1:0]

See axi_to_mem, port mem_region_o.

+

mem_rvalid_i: input logic [NUM_BANKS-1:0]

See axi_to_mem, port mem_rvalid_i.

-

mem_rdata_i: input mem_data_t [NUM_BANKS-1:0]

mem_rdata_i: input mem_data_t [NUM_BANKS-1:0]

See axi_to_mem, port mem_rdata_i.

-

mem_err_i: input logic [NUM_BANKS-1:0]

mem_err_i: input logic [NUM_BANKS-1:0]

See axi_to_mem, port mem_err_i.

-

mem_exokay_i: input logic [NUM_BANKS-1:0]

mem_exokay_i: input logic [NUM_BANKS-1:0]

See axi_to_mem, port mem_exokay_i.

Types

 diff --git a/detailed_mem/type.mem_req_t.html b/detailed_mem/type.mem_req_t.html index fbc88bfd8..de054e5f3 100644 --- a/detailed_mem/type.mem_req_t.html +++ b/detailed_mem/type.mem_req_t.html @@ -5,16 +5,18 @@

Typedef mem_req_t

typedef struct packed {
-    addr_t           addr;
-    axi_pkg::atop_t  atop;
-    logic            lock;
-    axi_strb_t       strb;
-    axi_data_t       wdata;
-    logic            we;
-    mem_id_t         id;
-    mem_user_t       user;
-    axi_pkg::cache_t cache;
-    axi_pkg::prot_t  prot;
+    addr_t            addr;
+    axi_pkg::atop_t   atop;
+    logic             lock;
+    axi_strb_t        strb;
+    axi_data_t        wdata;
+    logic             we;
+    mem_id_t          id;
+    mem_user_t        user;
+    axi_pkg::cache_t  cache;
+    axi_pkg::prot_t   prot;
+    axi_pkg::qos_t    qos;
+    axi_pkg::region_t region;
   } mem_req_t;
diff --git a/detailed_mem/type.meta_t.html b/detailed_mem/type.meta_t.html index a34a46275..e6434f635 100644 --- a/detailed_mem/type.meta_t.html +++ b/detailed_mem/type.meta_t.html @@ -5,17 +5,19 @@

Typedef meta_t

typedef struct packed {
-    addr_t           addr;
-    axi_pkg::atop_t  atop;
-    logic            lock;
-    axi_id_t         id;
-    logic            last;
-    axi_pkg::qos_t   qos;
-    axi_pkg::size_t  size;
-    logic            write;
-    mem_user_t       user;
-    axi_pkg::cache_t cache;
-    axi_pkg::prot_t  prot;
+    addr_t            addr;
+    axi_pkg::atop_t   atop;
+    logic             lock;
+    axi_id_t          id;
+    logic             last;
+    axi_pkg::qos_t    qos;
+    axi_pkg::size_t   size;
+    logic             write;
+    mem_user_t        user;
+    axi_pkg::cache_t  cache;
+    axi_pkg::prot_t   prot;
+    axi_pkg::qos_t    qos;
+    axi_pkg::region_t region;
   } meta_t;
diff --git a/detailed_mem/type.tmp_atop_t.html b/detailed_mem/type.tmp_atop_t.html index 285b86b9d..6a26b6670 100644 --- a/detailed_mem/type.tmp_atop_t.html +++ b/detailed_mem/type.tmp_atop_t.html @@ -5,12 +5,14 @@

Typedef tmp_atop_t

typedef struct packed {
-    axi_pkg::atop_t  atop;
-    logic            lock;
-    mem_id_t         id;
-    mem_user_t       user;
-    axi_pkg::cache_t cache;
-    axi_pkg::prot_t  prot;
+    axi_pkg::atop_t   atop;
+    logic             lock;
+    mem_id_t          id;
+    mem_user_t        user;
+    axi_pkg::cache_t  cache;
+    axi_pkg::prot_t   prot;
+    axi_pkg::qos_t    qos;
+    axi_pkg::region_t region;
   } tmp_atop_t;