From 6cb038eee70b164bf55fa529bffa86b20fb2ace1 Mon Sep 17 00:00:00 2001 From: Thomas Benz Date: Wed, 30 Nov 2022 09:53:00 +0100 Subject: [PATCH] Add VCS to CI --- .gitlab-ci.yml | 104 +++++++++++++++++++++++++++++++++++++++++++++ Makefile | 7 ++- scripts/run_vcs.sh | 3 +- 3 files changed, 112 insertions(+), 2 deletions(-) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 1ac12d887..b37b9fe5e 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -5,6 +5,10 @@ before_script: - export PATH=~/.cargo/bin:$PATH - mkdir -p build +stages: + - build + - test + vsim: stage: build script: @@ -179,3 +183,103 @@ axi_xbar: <<: *run_vsim variables: TEST_MODULE: axi_xbar + +vcs_axi_addr_test: + stage: test + script: + - make sim_vcs-axi_addr_test.log + +vcs_axi_atop_filter: + stage: test + script: + - make sim_vcs-axi_atop_filter.log + +vcs_axi_cdc: + stage: test + script: + - make sim_vcs-axi_cdc.log + +vcs_axi_delayer: + stage: test + script: + - make sim_vcs-axi_delayer.log + +vcs_axi_dw_downsizer: + stage: test + script: + - make sim_vcs-axi_dw_downsizer.log + +vcs_axi_dw_upsizer: + stage: test + script: + - make sim_vcs-axi_dw_upsizer.log + +vcs_axi_fifo: + stage: test + script: + - make sim_vcs-axi_fifo.log + +vcs_axi_isolate: + stage: test + script: + - make sim_vcs-axi_isolate.log + +vcs_axi_iw_converter: + stage: test + script: + - make sim_vcs-axi_iw_converter.log + +vcs_axi_lite_regs: + stage: test + script: + - make sim_vcs-axi_lite_regs.log + +vcs_axi_lite_to_apb: + stage: test + script: + - make sim_vcs-axi_lite_to_apb.log + +vcs_axi_lite_to_axi: + stage: test + script: + - make sim_vcs-axi_lite_to_axi.log + +vcs_axi_lite_mailbox: + stage: test + script: + - make sim_vcs-axi_lite_mailbox.log + +vcs_axi_lite_xbar: + stage: test + script: + - make sim_vcs-axi_lite_xbar.log + +vcs_axi_modify_address: + stage: test + script: + - make sim_vcs-axi_modify_address.log + +vcs_axi_serializer: + stage: test + script: + - make sim_vcs-axi_serializer.log + +vcs_axi_sim_mem: + stage: test + script: + - make sim_vcs-axi_sim_mem.log + +vcs_axi_to_axi_lite: + stage: test + script: + - make sim_vcs-axi_to_axi_lite.log + +vcs_axi_to_mem_banked: + stage: test + script: + - make sim_vcs-axi_to_mem_banked.log + +vcs_axi_xbar: + stage: test + script: + - make sim_vcs-axi_xbar.log diff --git a/Makefile b/Makefile index 82d75dfcf..1dad6b349 100644 --- a/Makefile +++ b/Makefile @@ -23,6 +23,11 @@ else VCS ?= vcs endif +# VCS_DEBUG ?= -debug_access+r +VCS_DEBUG ?= -debug_access+nomemcbk +VCS_XPROP ?= -xprop=xmerge +VCS_OPT ?= $(VCS_XPROP) $(VCS_DEBUG) -full64 -CFLAGS \"-O4\" -O4 -j9 + TBS ?= axi_addr_test \ axi_atop_filter \ axi_bus_compare \ @@ -103,7 +108,7 @@ compile_vcs.log: Bender.yml | build sim_vcs-%.log: compile_vcs.log - export VCS="$(VCS)"; cd build && ../scripts/run_vcs.sh --random-seed $* | tee ../$@ + export VCS="$(VCS)"; export VCS_OPT="$(VCS_OPT)"; cd build && ../scripts/run_vcs.sh --random-seed $* | tee ../$@ (! grep -n "Error" $@) (! grep -n "Fatal" $@) diff --git a/scripts/run_vcs.sh b/scripts/run_vcs.sh index 7dfdd9e55..58dfdf16b 100755 --- a/scripts/run_vcs.sh +++ b/scripts/run_vcs.sh @@ -22,11 +22,12 @@ ROOT=$(cd "$(dirname "${BASH_SOURCE[0]}")/.." && pwd) SEEDS=(0) call_vcs() { - $VCS -Mlib=work-"${@: -1}" -Mdir=work-"${@: -1}" -debug_access+r -CFLAGS "-Os" -full64 -xprop=xmerge "$@" + $VCS -Mlib=work-"${@: -1}" -Mdir=work-"${@: -1}" $VCS_OPT "$@" for seed in ${SEEDS[@]}; do echo echo "----" echo "Running with seed: $seed" + echo "VCS options: $VCS_OPT" ./"${@: -1}" +ntb_random_seed=$seed -exitstatus | tee "${@: -1}"_$seed.log 2>&1 (! grep -n "Error" "${@: -1}"_$seed.log) (! grep -n "Fatal" "${@: -1}"_$seed.log)