diff --git a/src/axi_id_serialize.sv b/src/axi_id_serialize.sv
index fc36a217f..b032c7766 100644
--- a/src/axi_id_serialize.sv
+++ b/src/axi_id_serialize.sv
@@ -65,7 +65,7 @@ module axi_id_serialize #(
   /// Number of Entries in the explicit ID map (default: None)
   parameter int unsigned IdMapNumEntries = 32'd0,
   /// Explicit ID map; index [0] in each entry is the input ID to match, index [1] the output ID.
-  parameter int unsigned IdMap [IdMapNumEntries-1:0][0:1] = '{default: '{32'b0, 32'b0}}
+  parameter int unsigned IdMap [IdMapNumEntries-1:0][0:1] = '{default: {32'b0, 32'b0}}
 ) (
   /// Rising-edge clock of both ports
   input  logic      clk_i,