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target/riscv: remove duplicate progbufsize field
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* removed `progbuf_size`  field from `riscv_info`; added getter
* moved `impebreak` field from `riscv_info` to `riscv013_info`
  as implementation dependent field; added getter

Signed-off-by: Farid Khaydari <f.khaydari@syntacore.com>
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fk-sc committed Sep 4, 2024
1 parent 8ea44aa commit 3f26c01
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Showing 5 changed files with 40 additions and 20 deletions.
4 changes: 2 additions & 2 deletions src/target/riscv/program.c
Original file line number Diff line number Diff line change
Expand Up @@ -183,8 +183,8 @@ int riscv_program_ebreak(struct riscv_program *p)
{
struct target *target = p->target;
RISCV_INFO(r);
if (p->instruction_count == riscv_progbuf_size(p->target) &&
r->impebreak) {
if (p->instruction_count == riscv_progbuf_size(target) &&
r->get_impebreak(target)) {
return ERROR_OK;
}
return riscv_program_insert(p, ebreak());
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12 changes: 12 additions & 0 deletions src/target/riscv/riscv-011.c
Original file line number Diff line number Diff line change
Expand Up @@ -2356,6 +2356,16 @@ static int riscv011_authdata_write(struct target *target, uint32_t value, unsign
return ERROR_OK;
}

static bool riscv011_get_impebreak(const struct target *target)
{
return false;
}

static unsigned int riscv011_get_progbufsize(const struct target *target)
{
return 0;
}

static int init_target(struct command_context *cmd_ctx,
struct target *target)
{
Expand All @@ -2365,6 +2375,8 @@ static int init_target(struct command_context *cmd_ctx,
generic_info->authdata_read = &riscv011_authdata_read;
generic_info->authdata_write = &riscv011_authdata_write;
generic_info->print_info = &riscv011_print_info;
generic_info->get_impebreak = &riscv011_get_impebreak;
generic_info->get_progbufsize = &riscv011_get_progbufsize;

generic_info->version_specific = calloc(1, sizeof(riscv011_info_t));
if (!generic_info->version_specific)
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33 changes: 22 additions & 11 deletions src/target/riscv/riscv-013.c
Original file line number Diff line number Diff line change
Expand Up @@ -67,6 +67,8 @@ static int read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer, uint32_t increment);
static int write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer);
static bool riscv013_get_impebreak(const struct target *target);
static unsigned int riscv013_get_progbufsize(const struct target *target);

typedef enum {
HALT_GROUP,
Expand Down Expand Up @@ -153,7 +155,9 @@ typedef struct {
/* Number of abstract command data registers. */
unsigned datacount;
/* Number of words in the Program Buffer. */
unsigned progbufsize;
unsigned int progbufsize;
/* Hart contains an implicit ebreak at the end of the program buffer. */
bool impebreak;

/* We cache the read-only bits of sbcs here. */
uint32_t sbcs;
Expand Down Expand Up @@ -1310,9 +1314,7 @@ static unsigned int register_size(struct target *target, enum gdb_regno number)
static bool has_sufficient_progbuf(struct target *target, unsigned size)
{
RISCV013_INFO(info);
RISCV_INFO(r);

return info->progbufsize + r->impebreak >= size;
return info->progbufsize + info->impebreak >= size;
}

/**
Expand Down Expand Up @@ -2037,14 +2039,13 @@ static int examine(struct target *target)
LOG_TARGET_INFO(target, "datacount=%d progbufsize=%d",
info->datacount, info->progbufsize);

RISCV_INFO(r);
r->impebreak = get_field(dmstatus, DM_DMSTATUS_IMPEBREAK);
info->impebreak = get_field(dmstatus, DM_DMSTATUS_IMPEBREAK);

if (!has_sufficient_progbuf(target, 2)) {
LOG_TARGET_WARNING(target, "We won't be able to execute fence instructions on this "
"target. Memory may not always appear consistent. "
"(progbufsize=%d, impebreak=%d)", info->progbufsize,
r->impebreak);
info->impebreak);
}

if (info->progbufsize < 4 && riscv_enable_virtual) {
Expand All @@ -2060,6 +2061,8 @@ static int examine(struct target *target)
enum riscv_hart_state state_at_examine_start;
if (riscv_get_hart_state(target, &state_at_examine_start) != ERROR_OK)
return ERROR_FAIL;

RISCV_INFO(r);
const bool hart_halted_at_examine_start = state_at_examine_start == RISCV_STATE_HALTED;
if (!hart_halted_at_examine_start) {
r->prepped = true;
Expand All @@ -2073,10 +2076,6 @@ static int examine(struct target *target)
target->state = TARGET_HALTED;
target->debug_reason = hart_halted_at_examine_start ? DBG_REASON_UNDEFINED : DBG_REASON_DBGRQ;

/* Without knowing anything else we can at least mess with the
* program buffer. */
r->progbuf_size = info->progbufsize;

result = riscv013_reg_examine_all(target);
if (result != ERROR_OK)
return result;
Expand Down Expand Up @@ -2817,6 +2816,8 @@ static int init_target(struct command_context *cmd_ctx,
generic_info->read_memory = read_memory;
generic_info->data_bits = &riscv013_data_bits;
generic_info->print_info = &riscv013_print_info;
generic_info->get_impebreak = &riscv013_get_impebreak;
generic_info->get_progbufsize = &riscv013_get_progbufsize;

generic_info->handle_became_unavailable = &handle_became_unavailable;
generic_info->tick = &tick;
Expand Down Expand Up @@ -4872,6 +4873,16 @@ static int write_memory(struct target *target, target_addr_t address,
return ret;
}

static bool riscv013_get_impebreak(const struct target *target)
{
return get_info(target)->impebreak;
}

static unsigned int riscv013_get_progbufsize(const struct target *target)
{
return get_info(target)->progbufsize;
}

static int arch_state(struct target *target)
{
return ERROR_OK;
Expand Down
2 changes: 1 addition & 1 deletion src/target/riscv/riscv.c
Original file line number Diff line number Diff line change
Expand Up @@ -5569,7 +5569,7 @@ static enum riscv_halt_reason riscv_halt_reason(struct target *target)
size_t riscv_progbuf_size(struct target *target)
{
RISCV_INFO(r);
return r->progbuf_size;
return r->get_progbufsize(target);
}

int riscv_write_progbuf(struct target *target, int index, riscv_insn_t insn)
Expand Down
9 changes: 3 additions & 6 deletions src/target/riscv/riscv.h
Original file line number Diff line number Diff line change
Expand Up @@ -167,12 +167,6 @@ struct riscv_info {
* most recent halt was not caused by a trigger, then this is -1. */
int64_t trigger_hit;

/* The number of entries in the program buffer. */
int progbuf_size;

/* This hart contains an implicit ebreak at the end of the program buffer. */
bool impebreak;

bool triggers_enumerated;

/* Decremented every scan, and when it reaches 0 we clear the learned
Expand Down Expand Up @@ -236,6 +230,9 @@ struct riscv_info {
int (*dmi_read)(struct target *target, uint32_t *value, uint32_t address);
int (*dmi_write)(struct target *target, uint32_t address, uint32_t value);

bool (*get_impebreak)(const struct target *target);
unsigned int (*get_progbufsize)(const struct target *target);

/* Get the DMI address of target's DM's register.
* The function should return the passed address
* if the target is not assigned a DM yet.
Expand Down

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