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Change-Id: Iac1a79e7ad40daefb6c2e8ce403928e3c171479f
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
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aap-sc committed Nov 29, 2023
1 parent 5cb6669 commit f5bc52d
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Showing 5 changed files with 41 additions and 45 deletions.
12 changes: 9 additions & 3 deletions src/target/riscv/program.c
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Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,7 @@
#include "helper/log.h"

#include "asm.h"
#include "debug_defines.h"
#include "encoding.h"

/* Program interface. */
Expand All @@ -26,7 +27,7 @@ int riscv_program_init(struct riscv_program *p, struct target *target)
for (size_t i = 0; i < RISCV_MAX_DEBUG_BUFFER_SIZE; ++i)
p->debug_buffer[i] = -1;

p->exec_status = RISCV_DBGBUF_EXEC_RESULT_NOT_EXECUTED;
p->execution_result = RISCV_DBGBUF_EXEC_RESULT_NOT_EXECUTED;
return ERROR_OK;
}

Expand All @@ -47,7 +48,7 @@ int riscv_program_exec(struct riscv_program *p, struct target *t)
{
keep_alive();

p->exec_status = RISCV_DBGBUF_EXEC_RESULT_UNKNOWN;
p->execution_result = RISCV_DBGBUF_EXEC_RESULT_UNKNOWN;
riscv_reg_t saved_registers[GDB_REGNO_XPR31 + 1];
for (size_t i = GDB_REGNO_ZERO + 1; i <= GDB_REGNO_XPR31; ++i) {
if (p->writes_xreg[i]) {
Expand All @@ -69,11 +70,16 @@ int riscv_program_exec(struct riscv_program *p, struct target *t)
if (riscv_program_write(p) != ERROR_OK)
return ERROR_FAIL;

if (riscv_execute_debug_buffer(t, &p->exec_status) != ERROR_OK) {
unsigned int abstractcs_err;
if (riscv_execute_debug_buffer(t, &abstractcs_err) != ERROR_OK) {
p->execution_result = (abstractcs_err == DM_ABSTRACTCS_CMDERR_EXCEPTION)
? RISCV_DBGBUF_EXEC_RESULT_EXCEPTION
: RISCV_DBGBUF_EXEC_RESULT_UNKNOWN;
/* TODO: what happens if we fail here, but need to restore registers? */
LOG_TARGET_DEBUG(t, "Unable to execute program %p", p);
return ERROR_FAIL;
}
p->execution_result = RISCV_DBGBUF_EXEC_RESULT_SUCCESS;

/* TODO: what happens if we can not restore context ? */
for (size_t i = GDB_REGNO_ZERO; i <= GDB_REGNO_XPR31; ++i)
Expand Down
11 changes: 9 additions & 2 deletions src/target/riscv/program.h
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Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,13 @@
#define RISCV_REGISTER_COUNT 32
#define RISCV_DSCRATCH_COUNT 2

typedef enum {
RISCV_DBGBUF_EXEC_RESULT_NOT_EXECUTED,
RISCV_DBGBUF_EXEC_RESULT_EXCEPTION,
RISCV_DBGBUF_EXEC_RESULT_UNKNOWN,
RISCV_DBGBUF_EXEC_RESULT_SUCCESS
} riscv_dbgbuf_exec_status_t;

/* The various RISC-V debug specifications all revolve around setting up
* program buffers and executing them on the target. This structure contains a
* single program, which can then be executed on targets. */
Expand All @@ -27,9 +34,9 @@ struct riscv_program {
/* XLEN on the target. */
int target_xlen;

/* execution status of the command */
/* execution result of the program */
/* TODO: remove this field. We should make it a parameter to riscv_program_exec */
riscv_dbgbuf_exec_status_t exec_status;
riscv_dbgbuf_exec_status_t execution_result;
};

/* Initializes a program with the header. */
Expand Down
48 changes: 19 additions & 29 deletions src/target/riscv/riscv-013.c
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Original file line number Diff line number Diff line change
Expand Up @@ -55,7 +55,7 @@ static riscv_insn_t riscv013_read_debug_buffer(struct target *target, unsigned i
index);
static int riscv013_invalidate_cached_debug_buffer(struct target *target);
static int riscv013_execute_debug_buffer(struct target *target,
riscv_dbgbuf_exec_status_t *exec_status);
unsigned int *abstractcs_err);
static void riscv013_fill_dmi_write_u64(struct target *target, char *buf, int a, uint64_t d);
static void riscv013_fill_dmi_read_u64(struct target *target, char *buf, int a);
static int riscv013_dmi_write_u64_bits(struct target *target);
Expand Down Expand Up @@ -110,12 +110,13 @@ typedef enum slot {

/*** Debug Bus registers. ***/

#define CMDERR_NONE 0
#define CMDERR_BUSY 1
#define CMDERR_NOT_SUPPORTED 2
#define CMDERR_EXCEPTION 3
#define CMDERR_HALT_RESUME 4
#define CMDERR_OTHER 7
/* TODO: CMDERR_* defines can removed */
#define CMDERR_NONE DM_ABSTRACTCS_CMDERR_NONE
#define CMDERR_BUSY DM_ABSTRACTCS_CMDERR_BUSY
#define CMDERR_NOT_SUPPORTED DM_ABSTRACTCS_CMDERR_NOT_SUPPORTED
#define CMDERR_EXCEPTION DM_ABSTRACTCS_CMDERR_EXCEPTION
#define CMDERR_HALT_RESUME DM_ABSTRACTCS_CMDERR_HALT_RESUME
#define CMDERR_OTHER DM_ABSTRACTCS_CMDERR_OTHER

#define HART_INDEX_MULTIPLE -1
#define HART_INDEX_UNKNOWN -2
Expand Down Expand Up @@ -861,10 +862,10 @@ static int dm013_select_target(struct target *target)
}

static int execute_abstract_command(struct target *target, uint32_t command,
unsigned int *p_abstractcs_err)
unsigned int *cmderr)
{
assert(p_abstractcs_err);
*p_abstractcs_err = CMDERR_NONE;
assert(cmderr);
*cmderr = CMDERR_NONE;
if (debug_level >= LOG_LVL_DEBUG) {
switch (get_field(command, DM_COMMAND_CMDTYPE)) {
case 0:
Expand All @@ -889,8 +890,8 @@ static int execute_abstract_command(struct target *target, uint32_t command,
LOG_TARGET_DEBUG(target, "command 0x%" PRIx32 " failed (unknown fatal error)", command);
return wait_result;
}
*p_abstractcs_err = get_field(abstractcs, DM_ABSTRACTCS_CMDERR);
if (*p_abstractcs_err != CMDERR_NONE) {
*cmderr = get_field(abstractcs, DM_ABSTRACTCS_CMDERR);
if (*cmderr != CMDERR_NONE) {
LOG_TARGET_DEBUG(target, "command 0x%" PRIx32 " failed; abstractcs=0x%" PRIx32 "",
command, abstractcs);
/* Attempt to clear the error. */
Expand Down Expand Up @@ -2907,7 +2908,7 @@ static int execute_fence(struct target *target)
riscv_program_fence_i(&program);
riscv_program_fence_rw_rw(&program);
if (riscv_program_exec(&program, target) != ERROR_OK) {
if (program.exec_status != RISCV_DBGBUF_EXEC_RESULT_EXCEPTION) {
if (program.execution_result != RISCV_DBGBUF_EXEC_RESULT_EXCEPTION) {
LOG_TARGET_ERROR(target, "Unexpected error during fence execution");
return ERROR_FAIL;
}
Expand All @@ -2920,7 +2921,7 @@ static int execute_fence(struct target *target)
riscv_program_init(&program, target);
riscv_program_fence_i(&program);
if (riscv_program_exec(&program, target) != ERROR_OK) {
if (program.exec_status != RISCV_DBGBUF_EXEC_RESULT_EXCEPTION) {
if (program.execution_result != RISCV_DBGBUF_EXEC_RESULT_EXCEPTION) {
LOG_TARGET_ERROR(target, "Unexpected error during fence.i execution");
return ERROR_FAIL;
}
Expand All @@ -2930,7 +2931,7 @@ static int execute_fence(struct target *target)
riscv_program_init(&program, target);
riscv_program_fence_rw_rw(&program);
if (riscv_program_exec(&program, target) != ERROR_OK) {
if (program.exec_status != RISCV_DBGBUF_EXEC_RESULT_EXCEPTION) {
if (program.execution_result != RISCV_DBGBUF_EXEC_RESULT_EXCEPTION) {
LOG_TARGET_ERROR(target, "Unexpected error during fence rw, rw execution");
return ERROR_FAIL;
}
Expand Down Expand Up @@ -5026,27 +5027,16 @@ static int riscv013_invalidate_cached_debug_buffer(struct target *target)
}

static int riscv013_execute_debug_buffer(struct target *target,
riscv_dbgbuf_exec_status_t *exec_status)
unsigned int *abstractcs_err)
{
assert(exec_status);
assert(abstractcs_err);
uint32_t run_program = 0;
run_program = set_field(run_program, AC_ACCESS_REGISTER_AARSIZE, 2);
run_program = set_field(run_program, AC_ACCESS_REGISTER_POSTEXEC, 1);
run_program = set_field(run_program, AC_ACCESS_REGISTER_TRANSFER, 0);
run_program = set_field(run_program, AC_ACCESS_REGISTER_REGNO, 0x1000);

*exec_status = RISCV_DBGBUF_EXEC_RESULT_UNKNOWN;
unsigned int abstractcs_err;
int result = execute_abstract_command(target, run_program, &abstractcs_err);
if (result == ERROR_OK) {
*exec_status = RISCV_DBGBUF_EXEC_RESULT_SUCCESS;
assert(abstractcs_err == CMDERR_NONE);
return result;
}
*exec_status = (abstractcs_err == CMDERR_EXCEPTION)
? RISCV_DBGBUF_EXEC_RESULT_EXCEPTION
: RISCV_DBGBUF_EXEC_RESULT_UNKNOWN;
return result;
return execute_abstract_command(target, run_program, abstractcs_err);
}

static void riscv013_fill_dmi_write_u64(struct target *target, char *buf, int a, uint64_t d)
Expand Down
4 changes: 2 additions & 2 deletions src/target/riscv/riscv.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -5361,10 +5361,10 @@ riscv_insn_t riscv_read_debug_buffer(struct target *target, int index)
}

int riscv_execute_debug_buffer(struct target *target,
riscv_dbgbuf_exec_status_t *exec_status)
unsigned int *abstractcs_err)
{
RISCV_INFO(r);
return r->execute_debug_buffer(target, exec_status);
return r->execute_debug_buffer(target, abstractcs_err);
}

void riscv_fill_dm_write_u64(struct target *target, char *buf, int a, uint64_t d)
Expand Down
11 changes: 2 additions & 9 deletions src/target/riscv/riscv.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -118,13 +118,6 @@ struct reg_name_table {
char **reg_names;
};

typedef enum {
RISCV_DBGBUF_EXEC_RESULT_NOT_EXECUTED,
RISCV_DBGBUF_EXEC_RESULT_EXCEPTION,
RISCV_DBGBUF_EXEC_RESULT_UNKNOWN,
RISCV_DBGBUF_EXEC_RESULT_SUCCESS
} riscv_dbgbuf_exec_status_t;

struct riscv_info {
unsigned int common_magic;

Expand Down Expand Up @@ -237,7 +230,7 @@ struct riscv_info {
int (*write_debug_buffer)(struct target *target, unsigned index,
riscv_insn_t d);
riscv_insn_t (*read_debug_buffer)(struct target *target, unsigned index);
int (*execute_debug_buffer)(struct target *target, riscv_dbgbuf_exec_status_t *exec_status);
int (*execute_debug_buffer)(struct target *target, unsigned int *abstractcs_err);
int (*invalidate_cached_debug_buffer)(struct target *target);
int (*dmi_write_u64_bits)(struct target *target);
void (*fill_dm_write_u64)(struct target *target, char *buf, int a, uint64_t d);
Expand Down Expand Up @@ -438,7 +431,7 @@ size_t riscv_debug_buffer_size(struct target *target);

riscv_insn_t riscv_read_debug_buffer(struct target *target, int index);
int riscv_write_debug_buffer(struct target *target, int index, riscv_insn_t insn);
int riscv_execute_debug_buffer(struct target *target, riscv_dbgbuf_exec_status_t *exec_status);
int riscv_execute_debug_buffer(struct target *target, unsigned int *abstractcs_err);

void riscv_fill_dm_nop_u64(struct target *target, char *buf);
void riscv_fill_dm_write_u64(struct target *target, char *buf, int a, uint64_t d);
Expand Down

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