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target/riscv: fix halt reason for targets that do not support hit bit on triggers #1056

Merged
merged 1 commit into from
Jun 4, 2024
Merged

target/riscv: fix halt reason for targets that do not support hit bit on triggers #1056

merged 1 commit into from
Jun 4, 2024

Commits on May 28, 2024

  1. target/riscv: fix halt reason for targets that do not support hit bit… 

    … on triggers

Before this patch the following behavior is observed on targets that do
not support hit bit:

```
bp 0x80000004 4 hw
resume 0x80000000
riscv.cpu halted due to watchpoint
```

This happens because the current implementation relies on the presence
of hit bit way too much. While working on this patch few defects in
hit bit-based trigger detection were discovered, added appropriate
TODOs.
    @aap-sc
    aap-sc committed May 28, 2024
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