target/riscv: separate register cache stuff into files #1084
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Please, disregard the failure of Checkpatch. It is due to missing or SPDX-License-Identifier tags. |
Can be fixed by #1085. |
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This commit creates file structure for register cache related functions. Specifically: * `riscv_reg.h` -- general interface to registers. Safe to use after register cache initialization is successful. * `riscv_reg_impl.h` -- helper functions to use while implementing register cache initialization. * `riscv_reg.c` -- definitions of functions from `riscv_reg.h` and `riscv_reg_impl.h`. * `riscv-011_reg.h` -- register cache interface specific to 0.11 targets. * `riscv-013_reg.h` -- register cache interface specific to 0.13+ targets. * `riscv-011/0.13.h` -- version-specific methods used to access registers. Will be extended as needed once other functionality (not related to register access) is separated (e.g. DM/DTM specific stuff). Change-Id: I7918f78d0d79b97188c5703efd0296660e529f2a Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
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JanMatCodasip
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This commit creates file structure for register cache related functions.
Specifically:
riscv_reg.h-- general interface to registers. Safe to use after register cache initialization is successful.riscv_reg_impl.h-- helper functions to use while implementing register cache initialization.riscv_reg.c-- definitions of functions fromriscv_reg.handriscv_reg_impl.h.riscv-011_reg.h-- register cache interface specific to 0.11 targets.riscv-013_reg.h-- register cache interface specific to 0.13+ targets.riscv-011/0.13.h-- version-specific methods used to access registers. Will be extended as needed once other functionality (not related to register access) is separated (e.g. DM/DTM specific stuff).