Merge commit '05ee88915520d1dd82da94a016a9374a1f3a8129' from upstream #954
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The original document from Jedec does not report the entry for "21 NXP (Philips)", replaced by "c". It's clearly a typo. Keep the line from JEP106BF.01 for "NXP (Philips)". Change-Id: I30215c4ff08d5f112305cde6ab7a3176cdcef948 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7727 Tested-by: jenkins
The current cJTAG to JTAG switching commands for TI chips are not particularly reliable, especially on chips with accurate timing. On a Raspberry Pi the existing sequence has (depending on cabling and chip) a ~50% chance of working, on a much better-behaved FT2232H it doesn't manage to enable full JTAG at all. This change runs a bunch of test-idle cycles before actually attempting to switch to full JTAG. This makes the switch reliable even at high clock speeds (>100kHz) and from precise sources like the FT2232H. Change-Id: I9293e884bf3e9606d529756ae4483b844d3c39db Reported-by: Phil Wiggum <p1mail2015@mail.com> Fixes: https://sourceforge.net/p/openocd/tickets/375/ Signed-off-by: Lorenz Brun <lorenz@brun.one> Reviewed-on: https://review.openocd.org/c/openocd/+/7419 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This patch fixes skipping the semihosting sequence if the fileio mode is enabled on riscv. This change was tested by me and is in the riscv-openocd fork for a year now. Original merge request: #699 Original author: Wu Zhigang zhigang.wu@starfivetech.com https://github.com/wzgpeter Change-Id: Iadaa0a48d1f82d3a7ca168f8a6b656ff6ab78e03 Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7729 Tested-by: jenkins Reviewed-by: Tim Newsome <tim@sifive.com>
This patch introduces function semihosting_opcode_to_str() which converts semihosting opcodes to strings. This function is then used in debug messages to improve log analysis and troubleshooting. Change-Id: Iffea49dae13d6a626ae0db40d379cba3c9ea5bd3 Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7726 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
This patch fixes the handling of errno by setting the sys_errn only if error has actually occurred during the semihosting call. It also fixes few issues where error was not set in the first place. Change-Id: I2fbe562f3ec5e6220b800de04cd33aa1f409c7a0 Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7730 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Change-Id: Ib1d1be1067107633949a202a05f7fd06831ba84b Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7751 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Change-Id: I05e8596ffacdb6cd8da4dd8a40bb460183f4930a Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7728 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Change-Id: I4d2c1fbd4d6007ba8d5c8c687a7c13e25fb6a474 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7713 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Use configurable virtex pld driver to add support for more xilinx fpga families. Change-Id: Iff10c8c511787734fa289bdba15f03131d51e071 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7352 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
Add short description for gowin {read_status/read_user/reload}
commands.
Change-Id: Ib441f3a2c0f00346decdeb505c27afa2630e9b5d
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7736
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Change-Id: If6d237a6f27c4232849f73d08e7ca74276e6d464 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7714 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
To start a ipdbg server one needs to know the tap and the instruction code to reach the IPDBG-Hub. This instruction is vendor/family specific. Knowledge which can be provided by the pld driver. Change-Id: I13eeb9fee895d65cd48544da4704fcc9b528b869 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7369 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
STLINK-V3PWR is both a standalone debugger probe compatible with STLINK-V3 and a source measurement unit (SMU). Link: http://www.st.com/stlink-v3pwr This code adds support for the debugger probe functionality. Change-Id: Ib056e55722528f922c5574bb6fbf77e2f2b2b0c1 Signed-off-by: Laurent LEMELE <laurent.lemele@st.com> Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7755 Tested-by: jenkins
Compilation on old gcc 4.8.4 fails: error: missing braces around initializer [-Werror=missing-braces] Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com> Change-Id: Ie8b5747f9e23ba5a82bd7f666846e7286284a338 Reviewed-on: https://review.openocd.org/c/openocd/+/7815 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Adding a single file for each different ir-length. Change-Id: Iba3dd55b91c28fdb4d0cafa1ededd939fe61a267 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7715 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
Add more ultrascale devices. Set instruction codes for SSI devices such that refresh/program read_stat and user registers will work. Change-Id: Id0a0706f4016eb8a4732725a5b72ae61efd73421 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7716 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
See section 57.6.1 in RM0432. Change-Id: Ic4977aee74d1838f420c1d9ff19925d09f8f6e2b Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/7763 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Change-Id: Id241d9dd0793095106fea000422617fbef462669 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7770 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
Add USB VID:PID 0483:3755 and 0483:3757. Change-Id: Iace29fa97f1b8e9d86078b9775561ca525635523 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7768 Tested-by: jenkins
Consolidate commonly used commands and variables from chip config files into functions in esp_common.cfg. This includes "jtag newtap," "target create,"and "configure -event." Enhances code reusability and simplifies maintenance. Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com> Change-Id: I9e8bf07a4a15d4544ceb564607dea66837381d70 Reviewed-on: https://review.openocd.org/c/openocd/+/7744 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
…_common.cfg This commit enhances code reusability, simplifies maintenance, and ensures consistency across all chip configurations by consolidating commonly used commands and variables into the common config file. Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com> Change-Id: I9181737d83eeba4e983b6a455b8a1523f2576dd2 Reviewed-on: https://review.openocd.org/c/openocd/+/7745 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
…sp_common.cfg This commit enhances code reusability, simplifies maintenance, and ensures consistency across all chip configurations by consolidating commonly used commands and variables into the common config file. Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com> Change-Id: I36c86fe4ebc99928ce48a5bff8cb9580a0fa3ac0 Reviewed-on: https://review.openocd.org/c/openocd/+/7746 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
…sp_common.cfg This commit enhances code reusability, simplifies maintenance, and ensures consistency across all chip configurations by consolidating commonly used commands and variables into the common config file. Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com> Change-Id: Ifb0122f3b98a767f27746409499733b70fb7d0e8 Reviewed-on: https://review.openocd.org/c/openocd/+/7747 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Right after target halt, some activities needs to be done such as printing exception reason, disable wdts and reading debug stubs information. Missing activities will be submitted in the next patches. Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com> Change-Id: I27aad5614d903f4bd7c8d6dba6bfb0bdb93ed8dc Reviewed-on: https://review.openocd.org/c/openocd/+/7757 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
Debug stubs functionality provided by ESP IDF allows executing target function in any address. e.g; esp32_cmd_gcov() Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com> Change-Id: I56d844e5a862c9bf33fdb991b01abb7a76047ca7 Reviewed-on: https://review.openocd.org/c/openocd/+/7758 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Memory region addresses are not in use for now. Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com> Change-Id: I9a2189e956ae59b56245ec914ab16719df857b2d Reviewed-on: https://review.openocd.org/c/openocd/+/7762 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This config file enables communication over USB-JTAG with ESP32-C3, ESP32-S3, ESP32-H2 and ESP32-C6 chips Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com> Change-Id: Iceea26972588d8c4919d1f3248684ece48ca9121 Reviewed-on: https://review.openocd.org/c/openocd/+/7748 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Board config file for ESP32-S3, to allow communication with the builtin USB-JTAG adapter. Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com> Change-Id: I1310f5db30f7df38fe9344f7ba2334611b53863e Reviewed-on: https://review.openocd.org/c/openocd/+/7749 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
While not affecting the function's main purpose, an error has crept into arc_save_context() that results in logging wrong register values when the debug level is 3 or more. For instance, when debugging a trivial program and halting at entry to main, the following values are printed to the log: Debug: 2915 2020 arc.c:894 arc_save_context(): Get core register regnum=0, name=r0, value=0x0000000 ... Debug: 2947 2020 arc.c:894 arc_save_context(): Get core register regnum=60, name=lp_count, value=0x900002d8 Debug: 2948 2020 arc.c:894 arc_save_context(): Get core register regnum=63, name=pcl, value=0xffffffff Debug: 2949 2020 arc.c:909 arc_save_context(): Get aux register regnum=64, name=pc, value=0x900000b4 Debug: 2950 2020 arc.c:909 arc_save_context(): Get aux register regnum=65, name=lp_start, value=0x900000bc Debug: 2951 2020 arc.c:909 arc_save_context(): Get aux register regnum=66, name=lp_end, value=0x00080801 Debug: 2952 2020 arc.c:909 arc_save_context(): Get aux register regnum=67, name=status32, value=0xffffffff After the change, the register contents make much more sense: Debug: 2923 3934 arc.c:889 arc_save_context(): Get core register regnum=0, name=r0, value=0x00000000 ... Debug: 2955 3934 arc.c:889 arc_save_context(): Get core register regnum=60, name=lp_count, value=0x00000000 Debug: 2956 3934 arc.c:889 arc_save_context(): Get core register regnum=63, name=pcl, value=0x900002d8 Debug: 2957 3934 arc.c:903 arc_save_context(): Get aux register regnum=64, name=pc, value=0x900002da Debug: 2958 3934 arc.c:903 arc_save_context(): Get aux register regnum=65, name=lp_start, value=0x900000b4 Debug: 2959 3934 arc.c:903 arc_save_context(): Get aux register regnum=66, name=lp_end, value=0x900000bc Debug: 2960 3934 arc.c:903 arc_save_context(): Get aux register regnum=67, name=status32, value=0x00080801 While at it, simplify a couple of expressions. Change-Id: I8f2d79404707fbac4503af45b393ea73f91e6beb Signed-off-by: Artemiy Volkov <artemiy@synopsys.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7765 Tested-by: jenkins Reviewed-by: Evgeniy Didin <didin@synopsys.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
…neling. Change-Id: I5d4764c777f33d48705b3e5273eb840c13cfbfb7 Signed-off-by: eolson <erin.olson@seagate.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7814 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
…'init' Change-Id: Ib21366b2fdbf33ee06a958e52b725989114751f4 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7821 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Change-Id: I0d38533748898516dce44e81d0bff6bd35ee4aec Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7842 Reviewed-by: Jan Matyas <jan.matyas@codasip.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This patch changes data types of watchpoint value and mask to allow for 64-bit values match that some architectures (like RISCV) allow. In addition this patch fixes the behavior of watchpoint command to zero-out mask if only data value is provided. Change-Id: I3c7ec1630f03ea9534ec34c0ebe99e08ea56e7f0 Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7840 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com> Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Add the full text of the LGPL 2.1 license to OpenOCD. It was copied directly from: https://spdx.org/licenses/LGPL-2.1.html#licenseText Add the required tags for reference and tooling. Checkpatch-ignore: FSF_MAILING_ADDRESS Change-Id: I081f2197fb3c60e17cd6e3353d38194c720ee8a3 Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7743 Tested-by: jenkins Reviewed-by: ahmed BOUDJELIDA <aboudjelida@nanoxplore.com>
The USB control transfer can be executed without any data. The libusb API libusb_control_transfer() can thus be called with zero 'size', thus returning zero byte transferred when succeed. The OpenOCD API jtag_libusb_control_transfer() returns zero either in case of transfer error and in case of libusb_control_transfer() returning zero, making impossible discriminating the two cases. Extend jtag_libusb_control_transfer() with separate return value for error code and explicit parameter's pointer for transferred bytes. Make the transferred pointer optional, as many callers do not properly handle the returned value. Use 'int' type pointer for transferred, instead of the 'uint16_t' that would have matched the type of 'size'. This can simplify the caller's code by using a single 'int transferred' variable shared with other jtag_libusb_bulk_read|write, while keeping possible the comparison int vs uint16_t without cast. This change is inspired from commit d612baa ("jtag_libusb_bulk_read|write: return error code instead of size") Change-Id: I14d9bff3e845675be03465c307a136e69eebc317 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7756 Tested-by: jenkins Reviewed-by: ahmed BOUDJELIDA <aboudjelida@nanoxplore.com>
This is ANGIE's firmware and bitstream code. The 'Embeded C' code is based on the openULINK project. The hdl bitstream source code is for the spartan-6 FPGA included in ANGIE. Since ANGIE has a different microcontroller (EZ-USB FX2) than openULINK (EZ-USB AN2131), the registers file (reg_ezusb.h) has been changed completely, so are the descriptors, interruptions and the endpoints configuration. Change-Id: I70590c7c58bac6f1939c5ffba57e87d86850664d Signed-off-by: Ahmed BOUDJELIDA <aboudjelida@nanoxplore.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7701 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This is the driver code for NanoXplore's ANGIE USB-JTAG Adapter. The driver is based on the openULINK project. This driver communicate with ANGIE's firmware in order to establish JTAG protocol to debug the target chip. Since the ANGIE Adapter has a Spartan-6 FPGA in addition to the FX2 microcontroller, the driver adds two functions, one to download the firmware (embedded C) to the FX2, and the second to program the FPGA with its bitstream. Add ANGIE's configuration file to tcl/interface/ Add the device VID/PID to 60-openocd.rules file. Add ANGIE to OpenOCD's documentation Change-Id: Id17111c74073da01450d43d466e11b0cc086691f Signed-off-by: Ahmed BOUDJELIDA <aboudjelida@nanoxplore.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7702 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
BL702-based JTAG debugger that emulates FT2232D device Change-Id: Iefbf03645e6d8d154f4b1cad3385b8bc09da37dd Signed-off-by: gudvinr <gudvinr@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7830 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
This commit provides startup files for the Synopsys DesignWare ARC HSDK-4xD board. These have been adapted from the corresponding snps_hsdk.cfg files, the only functional change being the JTAG IDs for the new board's CPU cores. Change-Id: I19a0cd13bc09de90cfe2a7cccf1239e459fd8077 Signed-off-by: Artemiy Volkov <artemiy@synopsys.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7829 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Evgeniy Didin <didin@synopsys.com>
Add missing aarch64_poll() calls to ensure the event TARGET_EVENT_HALTED is called when necessary. This is needed with the poller update introduced in commit 95603fa ("openocd: revert workarounds for 'expr' syntax change") Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com> Change-Id: I6e91f1b6bc1f0d16e6f0eb76fc67d20111e3afd2 Reviewed-on: https://review.openocd.org/c/openocd/+/7737 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Change-Id: I31c5b19cd93ac41b026f824337488c9aa9b12439 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7828 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Change-Id: I7c475fbbf8c13ae227e3393f01528eb180e9de51 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7835 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
* Zetta 16 Mbit (2 MiB) SPI flash * Tested on Olimex RP2040-PICO30 and Neo6502 boards Change-Id: I02224dd7a72a9b72f01b31edbd958daa23f28956 Signed-off-by: Nikolay Dimitrov <nikolay.dimitrov@retrohub.org> Reviewed-on: https://review.openocd.org/c/openocd/+/7849 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
Use blocks (64 KiB) instead of sectors (4 KiB) when erasing the zd25Q16 SPI flash memory (thanks to Tomas Vanek!) Change-Id: I969a69ad35f51b84eb3e11b93f0d79db3e98613a Signed-off-by: Nikolay Dimitrov <nikolay.dimitrov@retrohub.org> Reviewed-on: https://review.openocd.org/c/openocd/+/7850 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
There's really no reason to try and add an extra layer of cpu verification here. Change-Id: If8c4aa03754607be6c089f514ae300b09b067ffa Signed-off-by: Karl Palsson <karlp@tweak.au> Reviewed-on: https://review.openocd.org/c/openocd/+/7844 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Presently, we only look at the Part Number field of the CPUID, and completely ignore the Implmentor field, simply assuming it to be ARM. Parts have since been found, with different implementors, that use overlapping part numbers, causing detection to fail. Expand the "part number" field to be a full implementor+part number, excluding the revision/patch fields, to make checking more reliable. Change-Id: Id81774f829104f57a0c105320d0d2e479fa01522 Signed-off-by: Karl Palsson <karlp@tweak.au> Reviewed-on: https://review.openocd.org/c/openocd/+/7845 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
timsifive
commented
Nov 3, 2023
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Lots of changes, but not much that could actually affect us.
Most changes that can be ignored are:
- Add angie debug device.
- PLD changes.
- JTAG driver changes, which seem like trivial error handling.
- Lots of target changes changing to LOG_TARGET* macros, many of which convert a warning to an error.
- Lots of ESP32 changes, none of which address the RISC-V core present on esp32s2 and esp32s3 (IIRC)
- Lots of
pld device->pld createin config files
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As usual, there are minor checkpatch complaints that I will override. |
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@timsifive , just a note. Once this commit is merged it would not hurt to address relevant TODO from this MR: https://github.com/riscv/riscv-openocd/pull/897/files |
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We took a look with @JanMatCodasip. It all looks fine, except for the esp_common.cfg file mentioned above. |
…tream Conflicts: src/jtag/drivers/xds110.c src/target/riscv/riscv.c src/target/riscv/riscv_semihosting.c tcl/target/esp_common.cfg Change-Id: If0c02817df03b7fd700cc84b4da2c02d36737d28
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I did my best to resolve the remaining esp_common.cfg conflicts. I don't have a target to test on, however. |
@timsifive LGTM. It works. Thanks |
JanMatCodasip
approved these changes
Nov 7, 2023
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