If the remote_bitbang host does not execute requests immediately,
delays performed inside OpenOCD can be lost. This option allows
the delays to be sent to the remote host so that they can be
queued and executed in order.

Signed-off-by: Jeremy Herbert <jeremy.006@gmail.com>
Signed-off-by: David Ryskalczyk <david.rysk@gmail.com>
Change-Id: Ie1b09e09ea132dd528139618e4305154819cbc9e
Reviewed-on: https://review.openocd.org/c/openocd/+/7472
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

In loops that typically take longer time to complete, check if there is
a pending shutdown request. If so, terminate the loop.

This allows to respond to a signal requesting a shutdown during some
loops which do not return control to main OpenOCD loop.

Change-Id: Iace0b58eddde1237832d0f9333a7c7b930565674
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8032
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

Add support for the TI K3 family J722S SoC. This SoC is a variant of
AM62P chassis with a different JTAG ID, additional R5 added in (along
with C7x and few other peripheral changes). Reuse existing definition.

For further details, see https://www.ti.com/lit/zip/sprujb3

Change-Id: I754e6be8df3a26212437ea955f6a791d7c99b0c8
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8049
Reviewed-by: Bryan Brattlof <hello@bryanbrattlof.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins

Add basic connection details with j722s EVM

For further details, see: https://www.ti.com/lit/zip/sprr495

Change-Id: Ic69d85d69c773c7fad2184561267391fef7a98bc
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8050
Reviewed-by: Bryan Brattlof <hello@bryanbrattlof.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins

Real dumps from adapters I have access to.
Serial numbers have been manually edited but are still consistent.

While there, rename a file to correct the USB PID.

Change-Id: I4fd0b6661d55294c2ce0ecbead765def1143880c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: e0059df ("doc: usb_adapters: add lsusb dump of few adapters")
Reviewed-on: https://review.openocd.org/c/openocd/+/8047
Tested-by: jenkins

For unknown reasons, the coreutils tool 'od' on MacOS outputs an
extra empty line, which appears in the new auto-generated files.

Modify the script bin2char.sh to drop every empty line.

Change-Id: Id835fecadb58ad4ddfc11ef9f9a2e8d75c5dffe9
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8051
Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Tested-by: jenkins
Reviewed-by: Henrik Nordström <henrik.nordstrom@addiva.se>

The original code supported ADIv5 only, just one SELECT register
with some reserved bits - the pseudo value DP_SELECT_INVALID was
just fine to indicate the DP SELECT register is in an unknown state.

Added ADIv6 support required DP SELECT and SELECT1 registers
without reserved bits. Therefore DP_SELECT_INVALID value became
reachable as a (fortunately not really used) ADIv6 AP ADDR.

JTAG DPBANKSEL setting support introduced with ADIv6 does not
honor DP_SELECT_INVALID correctly: required select value
gets compared to DP_SELECT_INVALID value and the most common zero
bank does not trigger DP SELECT write.

DP banked registers need just to set DP SELECT. ADIv6 AP register
addressing scheme may use both DP SELECT and SELECT1. This further
complicates using a single invalid value.

Moreover the difference how the SWD line reset influences
DPBANKSEL field between ADIv5 and ADIv6 deserves better handling
than setting select cache to zero and then to DP_SELECT_INVALID
in a very specific code positions.

Introduce bool flags indicating the validity of each SELECT
register and one SWD specific for DPBANKSEL field.
Use the latter to prevent selecting DP BANK before taking
the connection out of reset by reading DPIDR.

Treat DP SELECT and SELECT1 individually in ADIv6 64-bit mode.

Update comments to reflect the difference between ADIv5 and ADIv6
in SWD line reset.

Change-Id: Ibbb0b06cb592be072571218b666566a13d8dff0e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7541
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

SWD multidrop requires some initialization once before connecting
all daps. Provide an optional pre-connect dap operation.

Change-Id: I778215c512c56423a425dda80ab19a739f22f285
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7542
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

swd_connect_multidrop() sent DORMANT_TO_SWD and called
swd_multidrop_select_inner(). DORMANT_TO_SWD sequence ends
with a LINE_RESET sequence.
swd_multidrop_select_inner() sent LINE_RESET sequence again.
It was useless in this case.

swd_connect_multidrop() emited JTAG_TO_DORMANT and DORMANT_TO_SWD
sequences before connecting each DAP in SWD multidrop bus.
It is sufficient to emit JTAG_TO_DORMANT and DORMANT_TO_SWD
just once and emit the shorter LINE_RESET instead for subsequent DAPs.

Introduce a global variable swd_multidrop_in_swd_state
and use it to control what sequence is emitted.

In case of reconnect after an error, always use the full switch
JTAG_TO_DORMANT and DORMANT_TO_SWD.

Change-Id: Iba21620f6a9680793208bf398960ed0eb59df3b1
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7218
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

Change-Id: I7ac7b06d67ec806a9ebffc26a7c6b9c24f024478
Signed-off-by: Peter Collingbourne <pcc@google.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8043
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins

Some devices with an internal multi-tap JTAG router require a vendor
specific bypass instruction to bypass the master TAP when addressing
slave taps internal to the same device. On these devices the standard
bypass instruction bypasses the whole device.

Change-Id: I4506f0e67c9e4dfe39b7fa18c63d67900313e594
Signed-off-by: Henrik Nordström <henrik.nordstrom@addiva.se>
Reviewed-on: https://review.openocd.org/c/openocd/+/8041
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins

This has a quite complex JTAG router chain requiring both a custom
BYPASS instruction to access child taps, and JTAG configuration to
enable individual DAP nodes.

Change-Id: I6f5345764e1566d70c8526a7e8ec5d250185bd2c
Signed-off-by: Henrik Nordström <henrik.nordstrom@addiva.se>
Reviewed-on: https://review.openocd.org/c/openocd/+/8042
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

Some bitbang interfaces have no speed regulation and work as fast as
they can. Only the sequence of execuded commands is guaranteed but
not the timing. It works most of time with one exception: when the
JTAG_SLEEP command is executed, we expect that all previous commands
already finished so that the sleep interval is guaranteed.
For now  there may be situations when the sleep time has passed but
previous commands are not actually executed.
This patch adds a flush command to the bitbang interface, connects it
to the existing implementation for remote_bitbang, and runs it when
the JTAG_SLEEP command is executed.

Change-Id: If40894a63d29a260a4ded134b008df6dd1e89c46
Signed-off-by: Aleksey Shargalin <myokaski@gmail.com>
Signed-off-by: David Ryskalczyk <david.rysk@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/4284
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins

Change-Id: I91d4c05307d9611ecab11eb52218ab1cb7ed65e3
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8048
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>

Tested with APM32F030C8T.

Change-Id: I63cd8b66424135dae481a96ba560e6f0b1f9544e
Suggested-by: Christian U <info@cu-tec.de>
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8014
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

Tested with APM32F030C8T using SWD transport. All flash operations,
including sector and device protection, work as expected.

Revision identifier (0x0011) is not updated due to missing documentation.

Introduce a new directory structure that contains the manufacturer for
the sake of clarity.

Change-Id: I679387943b09fef640f8f8b6904e542f4e4b29aa
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8015
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins

Tested with APM32407RGT6 using JTAG and SWD transport. All flash
operations, including sector and device protection, work as expected.

Revision identifier (0x0009) is not updated due to missing documentation.

Change-Id: I33f4630fd00096656369ecc923aea2dcad77c7d3
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8016
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

Tested with APM32F103CBT6 using JTAG and SWD transport. All flash
operations, including sector and device protection, work as expected.

Change-Id: Ibefe1a65d710aea87b86ab7ff8a4153512a0ea4f
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8017
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

Change-Id: I2ff28b0fdf4923a58771a44ad6e83ac871d6fa9e
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8018
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

When Linux HID driver binds the USB endpoints of the adapter,
'lsusb' fails to read all the reports and prints
	** UNAVAILABLE **

Detect this case and alert the user, providing also the proper
command to unbind the driver before running the script again.
Put this test at the end of the output, so user can easily see it.

Change-Id: Iaca00040e666b62ceebe4b842a24932799bde56a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/8046
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

Add detection for mips cpu types by using prid.
Add cpuinfo command for inspecting more verbose info.
Add MIPS Architecture specs in openocd docs.

Change-Id: I28573b7c51783628db986bad0e226dcc399b4fa6
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7912
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>

Update mips32 cp0 command, it accepts cp0 reg names now.
Updated mips32 cp0 description.

Change-Id: Ib23dd13519def77a657c9c5bb039276746207b9b
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7905
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins

Add mips32 ejtag_reg command for inspecting ejtag status.
Add description for mips32 ejtag_reg command.

Change-Id: Icd173d3397d568b0c004a8cc3f45518d7b48ce43
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7906
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins

Update mips32 instructions, add barrier and sync related insts.
Add SYNC and barrier instruction blocks for memory access safety.

These instructions are not supported on Lexra and/or MIPSr1 CPUs,
detections were added and they will be executed conditionally.

Rework mips32_pracc_read/write_regs function.
Checkpatch-ignore: MACRO_ARG_REUSE

Change-Id: Ib14112f37ff1f060b1633df73d671a6b09bb2178
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7865
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

Change-Id: I3d4320634bf59be18bbcb22c9e4b13a3ccd7a45a
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8061
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>

S32K General-Purpose Microcontrollers

Scalable, low-power Arm® Cortex®-M series-based microcontrollers AEC-Q100
qualified with advanced safety and security and software support for
industrial and automotive ASIL B/D applications in body, zone control,
and electrification.

Change-Id: I4143258535437c18b81802436267bfd561de9d31
Signed-off-by: David Vidrie Leon <davidvidrie@geotab.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8012
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins

Introduce ti_be_lane_xor for byte lane correction
and use common code for both quirk and regular conversion.
The same lane correction takes place in both mem_ap_read/write()
- it was obfuscated in original code with different bitwise and arithmetic
operations.

Change-Id: I6a30672b908770323d30813a714e06ab8695fe26
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7574
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

Prevent packed writes with Nuvoton NPCX quirks because the workaround
uses all byte lanes for one byte or halfword and thus precludes packing.

Eliminate quirk code for size 4 as it is equivalent to the common code.

Make the quirk code for sizes 2 and 1 easier readable.

Change-Id: I72324e56a49b4712bd3769e03dce01427d9fcd73
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7575
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

Based on Daniel Goehring's [1] and Peter Collingbourne's [2] work.

Probe for support of 8, 16 bit and if the large data extension is available
also probe for 64, 128 and 256 bit operations.
Probe for the ability of packing 8 and 16 bit data
(formerly probed in mem_ap_init()). The probe is integrated to
mem_ap_read/write() routines and takes place just before the first memory
access of the specific size.

Add 64, 128 and 256 bit MEM-AP read/writes.

Introduce specific error codes for unsupported transfer size
and for unsupported packing.

Change-Id: I180c4ef17d2fc3189e8e2f14bafd22d857f29608
Link: 7191: target/adiv5: add MEM-AP 64-bit access support | https://review.openocd.org/c/openocd/+/7191
Link: 7436: arm_adi_v5: Support reads wider than 32 bits | https://review.openocd.org/c/openocd/+/7436
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7576
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins

…om_upstream

Change-Id: I6a718561985acf398ee47cec95c6ee6e24b9c9b7