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vfloat sequencing #221

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@orion160
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Prior to merge needs UopGen refactor

"vsaddu.vv" : {"pipe" : "vfixed", "uop_gen" : "ARITH", "latency" : 1},
"vsaddu.vx" : {"pipe" : "vfixed", "uop_gen" : "ARITH", "latency" : 1},
"vsaddu.vi" : {"pipe" : "vfixed", "uop_gen" : "ARITH", "latency" : 1},
"vsaddu.vv" : {"pipe" : "vint", "uop_gen" : "ARITH", "latency" : 1},
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Why did you get rid of the vfixed unit?

"vfrsub.vf" : {"pipe" : "vfloat", "uop_gen" : "ARITH", "latency" : 6},

# Vector Floating-Point Instructions: Vector Widening Floating-Point Add/Subtract Instructions
"vfwadd.vv" : {"pipe" : "vfloat", "uop_gen" : "ARITH", "latency" : 6},
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These instructions have wide dests so they should use ARITH_WIDE_DEST.

"vfnmsub.vf" : {"pipe" : "vfloat", "uop_gen" : "ARITH", "latency" : 6},

# Vector Floating-Point Instructions: Vector Widening Floating-Point Fused Multiply-Add Instructions
"vfwmacc.vv" : {"pipe" : "vfloat", "uop_gen" : "ARITH", "latency" : 6},
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These should use the ARITH_MAC which adds the destination of each uop as a source.

@kathlenemagnus-mips
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@orion160 the uop generators for the vector floating point instructions need to be reviewed. I would also add a new execution unit for vfmul to be analogous to the vmul unit.

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