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Add hypervisor support for PrivRw #540

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@lz-bro lz-bro commented Mar 1, 2024

Change-Id: I635a8f86b407f104ea74f00f4aefa1ce8170cb2d

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lz-bro commented Nov 12, 2024

@aswaterman Would you kindly take a look?

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I'm not familiar with this code, so I'd rather @aap-sc, @en-sc, or @timsifive sign off on this.

Comment on lines +1652 to +1653
# It may be affected by reset halt
misa = self.gdb.p(f"$misa=0x{self.hart.misa:x}")
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I don't quite get it. Which part is responsible for setting misa.H?

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When the power is turned on, the hart starts executing the brom code. Here does not affect this case, repeated testing will affect CheckMisa.

Comment on lines 1660 to 1661
self.supported.add(4)
self.supported.add(5)
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@en-sc en-sc Nov 12, 2024

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AFAIU, H extension does not require presence of both S and U extensions.
Therefore, I'd suggest something like:

Suggested change
self.supported.add(4)
self.supported.add(5)
self.supported_vmodes = self.supported
else:
self.supported_vmodes = None

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Thanks, addressed

@lz-bro lz-bro force-pushed the priv_add_v branch 5 times, most recently from c2340c6 to dffe978 Compare November 12, 2024 13:57
Change-Id: I635a8f86b407f104ea74f00f4aefa1ce8170cb2d
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3 participants