mimxrt: Enable UART 300bps for MIMXRT1020.

Trial build. Signed-off-by: robert-hh <robert@hammelrath.com>
robert-hh · Aug 30, 2023 · 20bc2a6 · 20bc2a6
1 parent 313068a
commit 20bc2a6
Show file tree

Hide file tree

Showing 3 changed files with 3 additions and 2 deletions.
diff --git a/ports/mimxrt/boards/MIMXRT1021_clock_config.c b/ports/mimxrt/boards/MIMXRT1021_clock_config.c
@@ -306,7 +306,7 @@ void BOARD_BootClockRUN(void) {
     CLOCK_DisableClock(kCLOCK_Lpuart7);
     CLOCK_DisableClock(kCLOCK_Lpuart8);
     /* Set UART_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+    CLOCK_SetDiv(kCLOCK_UartDiv, 1);
     /* Set Uart clock source. */
     CLOCK_SetMux(kCLOCK_UartMux, 0);
     /* Disable SPDIF clock gate. */

diff --git a/ports/mimxrt/boards/MIMXRT1021_clock_config.h b/ports/mimxrt/boards/MIMXRT1021_clock_config.h
@@ -79,7 +79,7 @@ void BOARD_InitBootClocks(void);
 #define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
 #define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
 #define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
-#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 40000000UL
 #define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL
 #define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 176000000UL
 #define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT 176000000UL

diff --git a/ports/mimxrt/machine_uart.c b/ports/mimxrt/machine_uart.c
@@ -282,6 +282,7 @@ STATIC mp_obj_t machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args
             self->timeout_char = min_timeout_char;
         }
 
+        // LPUART_Init(self->lpuart, &self->config, CLOCK_GetClockRootFreq(kCLOCK_UartClkRoot));
         LPUART_Init(self->lpuart, &self->config, BOARD_BOOTCLOCKRUN_UART_CLK_ROOT);
         LPUART_TransferCreateHandle(self->lpuart, &self->handle,  LPUART_UserCallback, self);
         uint8_t *buffer = m_new(uint8_t, rxbuf_len + 1);