mimxrt: Support the UART baudrate 300.

Which is still common. With the previous configuration, the lowest baud rate was 324. Signed-off-by: robert-hh <robert@hammelrath.com>
robert-hh · Aug 30, 2023 · d78b0ef · d78b0ef
1 parent 86d7d98
commit d78b0ef
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Showing 13 changed files with 18 additions and 13 deletions.
diff --git a/ports/mimxrt/boards/MIMXRT1011_clock_config.c b/ports/mimxrt/boards/MIMXRT1011_clock_config.c
@@ -241,7 +241,7 @@ void BOARD_BootClockRUN(void) {
     CLOCK_DisableClock(kCLOCK_Lpuart3);
     CLOCK_DisableClock(kCLOCK_Lpuart4);
     /* Set UART_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+    CLOCK_SetDiv(kCLOCK_UartDiv, 1);
     /* Set Uart clock source. */
     CLOCK_SetMux(kCLOCK_UartMux, 0);
     /* Disable SPDIF clock gate. */

diff --git a/ports/mimxrt/boards/MIMXRT1011_clock_config.h b/ports/mimxrt/boards/MIMXRT1011_clock_config.h
@@ -71,7 +71,7 @@ void BOARD_InitBootClocks(void);
 #define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
 #define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
 #define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
-#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 40000000UL
 #define BOARD_BOOTCLOCKRUN_USBPHY_CLK 0UL
 
 /*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.

diff --git a/ports/mimxrt/boards/MIMXRT1015_clock_config.c b/ports/mimxrt/boards/MIMXRT1015_clock_config.c
@@ -257,7 +257,7 @@ void BOARD_BootClockRUN(void) {
     CLOCK_DisableClock(kCLOCK_Lpuart3);
     CLOCK_DisableClock(kCLOCK_Lpuart4);
     /* Set UART_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+    CLOCK_SetDiv(kCLOCK_UartDiv, 1);
     /* Set Uart clock source. */
     CLOCK_SetMux(kCLOCK_UartMux, 0);
     /* Disable SPDIF clock gate. */

diff --git a/ports/mimxrt/boards/MIMXRT1015_clock_config.h b/ports/mimxrt/boards/MIMXRT1015_clock_config.h
@@ -74,7 +74,7 @@ void BOARD_InitBootClocks(void);
 #define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT            30000000UL
 #define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT          0UL
 #define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT             117333333UL
-#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT              80000000UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT              40000000UL
 #define BOARD_BOOTCLOCKRUN_USBPHY1_CLK                0UL
 
 /*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.

diff --git a/ports/mimxrt/boards/MIMXRT1021_clock_config.c b/ports/mimxrt/boards/MIMXRT1021_clock_config.c
@@ -306,7 +306,7 @@ void BOARD_BootClockRUN(void) {
     CLOCK_DisableClock(kCLOCK_Lpuart7);
     CLOCK_DisableClock(kCLOCK_Lpuart8);
     /* Set UART_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+    CLOCK_SetDiv(kCLOCK_UartDiv, 1);
     /* Set Uart clock source. */
     CLOCK_SetMux(kCLOCK_UartMux, 0);
     /* Disable SPDIF clock gate. */

diff --git a/ports/mimxrt/boards/MIMXRT1021_clock_config.h b/ports/mimxrt/boards/MIMXRT1021_clock_config.h
@@ -79,7 +79,7 @@ void BOARD_InitBootClocks(void);
 #define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
 #define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
 #define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
-#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 40000000UL
 #define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL
 #define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 176000000UL
 #define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT 176000000UL

diff --git a/ports/mimxrt/boards/MIMXRT1052_clock_config.c b/ports/mimxrt/boards/MIMXRT1052_clock_config.c
@@ -311,7 +311,7 @@ void BOARD_BootClockRUN(void) {
     CLOCK_DisableClock(kCLOCK_Lpuart7);
     CLOCK_DisableClock(kCLOCK_Lpuart8);
     /* Set UART_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+    CLOCK_SetDiv(kCLOCK_UartDiv, 1);
     /* Set Uart clock source. */
     CLOCK_SetMux(kCLOCK_UartMux, 0);
     /* Disable LCDIF clock gate. */

diff --git a/ports/mimxrt/boards/MIMXRT1052_clock_config.h b/ports/mimxrt/boards/MIMXRT1052_clock_config.h
@@ -83,7 +83,7 @@ void BOARD_InitBootClocks(void);
 #define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
 #define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
 #define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
-#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 40000000UL
 #define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL
 #define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 0UL
 #define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 198000000UL

diff --git a/ports/mimxrt/boards/MIMXRT1062_clock_config.c b/ports/mimxrt/boards/MIMXRT1062_clock_config.c
@@ -324,7 +324,7 @@ void BOARD_BootClockRUN(void) {
     CLOCK_DisableClock(kCLOCK_Lpuart7);
     CLOCK_DisableClock(kCLOCK_Lpuart8);
     /* Set UART_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+    CLOCK_SetDiv(kCLOCK_UartDiv, 1);
     /* Set Uart clock source. */
     CLOCK_SetMux(kCLOCK_UartMux, 0);
     /* Disable LCDIF clock gate. */

diff --git a/ports/mimxrt/boards/MIMXRT1062_clock_config.h b/ports/mimxrt/boards/MIMXRT1062_clock_config.h
@@ -86,7 +86,7 @@ void BOARD_InitBootClocks(void);
 #define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
 #define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
 #define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
-#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 40000000UL
 #define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL
 #define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 0UL
 #define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 198000000UL

diff --git a/ports/mimxrt/boards/MIMXRT1064_clock_config.c b/ports/mimxrt/boards/MIMXRT1064_clock_config.c
@@ -324,7 +324,7 @@ void BOARD_BootClockRUN(void) {
     CLOCK_DisableClock(kCLOCK_Lpuart7);
     CLOCK_DisableClock(kCLOCK_Lpuart8);
     /* Set UART_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+    CLOCK_SetDiv(kCLOCK_UartDiv, 1);
     /* Set Uart clock source. */
     CLOCK_SetMux(kCLOCK_UartMux, 0);
     /* Disable LCDIF clock gate. */

diff --git a/ports/mimxrt/boards/MIMXRT1064_clock_config.h b/ports/mimxrt/boards/MIMXRT1064_clock_config.h
@@ -86,7 +86,7 @@ void BOARD_InitBootClocks(void);
 #define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
 #define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
 #define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
-#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 40000000UL
 #define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL
 #define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 0UL
 #define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 198000000UL

diff --git a/ports/mimxrt/machine_uart.c b/ports/mimxrt/machine_uart.c
@@ -288,7 +288,12 @@ STATIC mp_obj_t machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args
             self->timeout_char = min_timeout_char;
         }
 
-        LPUART_Init(self->lpuart, &self->config, BOARD_BOOTCLOCKRUN_UART_CLK_ROOT);
+        #if defined(MIMXRT117x_SERIES)
+        // Use the Lpuart1 clock value, which is set for All UART devices.
+        LPUART_Init(self->lpuart, &self->config, CLOCK_GetRootClockFreq(kCLOCK_Root_Lpuart1));
+        #else
+        LPUART_Init(self->lpuart, &self->config, CLOCK_GetClockRootFreq(kCLOCK_UartClkRoot));
+        #endif
         LPUART_TransferCreateHandle(self->lpuart, &self->handle,  LPUART_UserCallback, self);
         uint8_t *buffer = m_new(uint8_t, rxbuf_len + 1);
         LPUART_TransferStartRingBuffer(self->lpuart, &self->handle, buffer, rxbuf_len);