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Merge pull request #51 from siliconcompiler/aux
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Creating a new auxlib
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gadfort authored May 30, 2024
2 parents 295abb8 + a08adfe commit 1615e88
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Showing 20 changed files with 2 additions and 12 deletions.
1 change: 1 addition & 0 deletions README.md
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Expand Up @@ -7,6 +7,7 @@ Lambdalib includes the following hardware categories:
| Category | Description |
|-------------------------------------|---------------------------------------|
|[stdlib](lambdalib/stdlib/rtl) | Standard cells (inv, nand, ff, ...)
|[auxlib](lambdalib/auxlib/rtl) | Aux cells can consist of multiple standard cells or physical only cells
|[ramlib](lambdalib/ramlib/rtl) | Memory (single port, dual port, fifo, ...)
|[iolib](lambdalib/iolib/rtl) | IO cells (bidir, vdd, clamp,...)
|[padring](lambdalib/padring/rtl) | Padring generator
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13 changes: 1 addition & 12 deletions lambdalib/__init__.py
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Expand Up @@ -9,6 +9,7 @@
_libraries = (
'iolib',
'stdlib',
'auxlib',
'ramlib',
'padring',
'syslib',
Expand Down Expand Up @@ -104,22 +105,10 @@ def copy(outputpath, la_lib='stdlib', exclude=None):


def generate(target, logiclib, outputpath, la_lib='stdlib', exclude=None):
exclude_default = (
'la_decap',
'la_keeper',
'la_footer',
'la_header',
'la_antenna',
'la_clkmux2',
'la_clkmux4'
)

full_exclude = []
if exclude:
full_exclude.extend(exclude)

full_exclude.extend(exclude_default)

# Ensure files are loaded
cells_dir = __get_lambdalib_dir(la_lib)

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