setup CI flow for verilog formatting

.github/workflows/ci.yml

@@ -31,3 +31,34 @@ jobs:
           pip install --upgrade pip
           pip install -e .[dev]
           pytest
+
+  lint_verilog:
+    name: Lint Verilog Code
+    runs-on: ubuntu-latest
+    steps:
+      - name: Check out Git repository
+        uses: actions/checkout@v4
+
+      - name: Check out siliconcompiler Git repository
+        uses: actions/checkout@v4
+        with:
+          repository: siliconcompiler/siliconcompiler
+          path: siliconcompiler
+
+      - name: Set up Verible
+        run: |
+          ./siliconcompiler/setup/install-verible.sh
+          echo /opt/verible/bin >> $GITHUB_PATH
+
+      - name: Check format
+        id: check-format
+        run: |
+          ./siliconcompiler/.github/workflows/bin/format_verilog.sh > files.txt
+          cat files.txt
+          git diff --exit-code
+
+      - name: Check lint
+        if: success() || steps.check-format.conclusion == 'failure'
+        run: |
+          verible-verilog-lint --rules_config ./siliconcompiler/.github/workflows/config/verible.rules `cat files.txt`
+