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Merge pull request #109 from siliconcompiler/interposer
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interposer pdk
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gadfort authored Nov 1, 2024
2 parents 4a29f3a + 12abfa8 commit 07fba47
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1 change: 1 addition & 0 deletions README.md
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Expand Up @@ -12,6 +12,7 @@ Supported PDKs:
* [Skywater130](lambdapdk/sky130/base/README.md)
* [Global Foundries 180](lambdapdk/gf180/README.md)
* [IHP 180](https://github.com/IHP-GmbH/IHP-Open-PDK)
* [interposer](lambdapdk/interposer/README.md)

# License

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8 changes: 5 additions & 3 deletions lambdapdk/__init__.py
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Expand Up @@ -20,10 +20,10 @@ def get_pdks():
Returns a list of pdk names in lambdapdk
'''

from lambdapdk import asap7, freepdk45, sky130, gf180, ihp130
from lambdapdk import asap7, freepdk45, sky130, gf180, ihp130, interposer

all_pdks = []
for pdk_mod in [asap7, freepdk45, sky130, gf180, ihp130]:
for pdk_mod in [asap7, freepdk45, sky130, gf180, ihp130, interposer]:
pdks = pdk_mod.setup()
if not isinstance(pdks, (list, tuple)):
pdks = [pdks]
Expand All @@ -43,14 +43,16 @@ def get_libs():
from lambdapdk.sky130.libs import sky130sc, sky130io, sky130sram
from lambdapdk.gf180.libs import gf180mcu, gf180io, gf180sram
from lambdapdk.ihp130.libs import sg13g2_stdcell, sg13g2_sram
from lambdapdk.interposer.libs import bumps as interposer_bumps

all_libs = []
for lib_mod in [
asap7sc7p5t, fakeram7, fakeio7,
nangate45, fakeram45,
sky130sc, sky130io, sky130sram,
gf180mcu, gf180io, gf180sram,
sg13g2_stdcell, sg13g2_sram]:
sg13g2_stdcell, sg13g2_sram,
interposer_bumps]:
libs = lib_mod.setup()
if not isinstance(libs, (list, tuple)):
libs = [libs]
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2 changes: 1 addition & 1 deletion lambdapdk/ihp130/libs/sg13g2_sram.py
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Expand Up @@ -15,7 +15,7 @@ def setup():
path_base = 'ihp-sg13g2/libs.ref/sg13g2_sram'
lib.add('output', stackup, 'lef', f'{path_base}/lef/{mem_name}.lef')
lib.add('output', stackup, 'gds', f'{path_base}/gds/{mem_name}.gds')
lib.add('output', stackup, 'cdl', f'{path_base}/spice/{mem_name}.cdl')
lib.add('output', stackup, 'cdl', f'{path_base}/cdl/{mem_name}.cdl')

lib.add('output', 'typ', 'nldm', f'{path_base}/lib/{mem_name}_typ_1p20V_25C.lib')
lib.add('output', 'slow', 'nldm', f'{path_base}/lib/{mem_name}_slow_1p08V_125C.lib')
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198 changes: 198 additions & 0 deletions lambdapdk/interposer/README.md
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# Interposer


The interposer PDK is a passive technology with a number of
simulated stackups. The PDK contains enablement for place and
route tools and design rule signoff.
Note that this process design kit is provided as an academic
and research aid only and the resulting designs are not manufacturable.



## Stackups
### 3ML_0400
```
metal name | width | spacing
------------------------------ | ------- | -------
topmetal | 400nm | 400nm
------------------------------ | ------- | -------
metal2 | 400nm | 400nm
------------------------------ | ------- | -------
metal1 | 400nm | 400nm
------------------------------ | ------- | -------
```

### 4ML_0400
```
metal name | width | spacing
------------------------------ | ------- | -------
topmetal | 400nm | 400nm
------------------------------ | ------- | -------
metal3 | 400nm | 400nm
------------------------------ | ------- | -------
metal2 | 400nm | 400nm
------------------------------ | ------- | -------
metal1 | 400nm | 400nm
------------------------------ | ------- | -------
```

### 5ML_0400
```
metal name | width | spacing
------------------------------ | ------- | -------
topmetal | 400nm | 400nm
------------------------------ | ------- | -------
metal4 | 400nm | 400nm
------------------------------ | ------- | -------
metal3 | 400nm | 400nm
------------------------------ | ------- | -------
metal2 | 400nm | 400nm
------------------------------ | ------- | -------
metal1 | 400nm | 400nm
------------------------------ | ------- | -------
```

### 3ML_0800
```
metal name | width | spacing
------------------------------ | ------- | -------
topmetal | 800nm | 800nm
------------------------------ | ------- | -------
metal2 | 800nm | 800nm
------------------------------ | ------- | -------
metal1 | 800nm | 800nm
------------------------------ | ------- | -------
```

### 4ML_0800
```
metal name | width | spacing
------------------------------ | ------- | -------
topmetal | 800nm | 800nm
------------------------------ | ------- | -------
metal3 | 800nm | 800nm
------------------------------ | ------- | -------
metal2 | 800nm | 800nm
------------------------------ | ------- | -------
metal1 | 800nm | 800nm
------------------------------ | ------- | -------
```

### 5ML_0800
```
metal name | width | spacing
------------------------------ | ------- | -------
topmetal | 800nm | 800nm
------------------------------ | ------- | -------
metal4 | 800nm | 800nm
------------------------------ | ------- | -------
metal3 | 800nm | 800nm
------------------------------ | ------- | -------
metal2 | 800nm | 800nm
------------------------------ | ------- | -------
metal1 | 800nm | 800nm
------------------------------ | ------- | -------
```

### 3ML_2000
```
metal name | width | spacing
------------------------------ | ------- | -------
topmetal | 2000nm | 2000nm
------------------------------ | ------- | -------
metal2 | 2000nm | 2000nm
------------------------------ | ------- | -------
metal1 | 2000nm | 2000nm
------------------------------ | ------- | -------
```

### 4ML_2000
```
metal name | width | spacing
------------------------------ | ------- | -------
topmetal | 2000nm | 2000nm
------------------------------ | ------- | -------
metal3 | 2000nm | 2000nm
------------------------------ | ------- | -------
metal2 | 2000nm | 2000nm
------------------------------ | ------- | -------
metal1 | 2000nm | 2000nm
------------------------------ | ------- | -------
```

### 5ML_2000
```
metal name | width | spacing
------------------------------ | ------- | -------
topmetal | 2000nm | 2000nm
------------------------------ | ------- | -------
metal4 | 2000nm | 2000nm
------------------------------ | ------- | -------
metal3 | 2000nm | 2000nm
------------------------------ | ------- | -------
metal2 | 2000nm | 2000nm
------------------------------ | ------- | -------
metal1 | 2000nm | 2000nm
------------------------------ | ------- | -------
```

### 3ML_0400_2000
```
metal name | width | spacing
------------------------------ | ------- | -------
topmetal | 2000nm | 2000nm
------------------------------ | ------- | -------
metal2 | 800nm | 800nm
------------------------------ | ------- | -------
metal1 | 400nm | 400nm
------------------------------ | ------- | -------
```

### 4ML_0400_2000
```
metal name | width | spacing
------------------------------ | ------- | -------
topmetal | 2000nm | 2000nm
------------------------------ | ------- | -------
metal3 | 2000nm | 2000nm
------------------------------ | ------- | -------
metal2 | 400nm | 400nm
------------------------------ | ------- | -------
metal1 | 400nm | 400nm
------------------------------ | ------- | -------
```

### 5ML_0400_2000
```
metal name | width | spacing
------------------------------ | ------- | -------
topmetal | 2000nm | 2000nm
------------------------------ | ------- | -------
metal4 | 2000nm | 2000nm
------------------------------ | ------- | -------
metal3 | 800nm | 800nm
------------------------------ | ------- | -------
metal2 | 400nm | 400nm
------------------------------ | ------- | -------
metal1 | 400nm | 400nm
------------------------------ | ------- | -------
```


## License
```
Copyright 2024 ZeroASIC Corp
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
https://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
```
111 changes: 111 additions & 0 deletions lambdapdk/interposer/__init__.py
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import os
import siliconcompiler
from lambdapdk import register_data_source


stackups = []
for m in ("3ML", "4ML", "5ML"):
for w in ("0400", "0800", "2000", "0400_2000"):
stackups.append(f'{m}_{w}')


####################################################
# PDK Setup
####################################################
def setup():
'''
The interposer PDK is a passive technology with a number of
simulated stackups. The PDK contains enablement for place and
route tools and design rule signoff.
Note that this process design kit is provided as an academic
and research aid only and the resulting designs are not manufacturable.
'''

foundry = 'virtual'
process = 'interposer'

libtype = 'none'

node = 130
# TODO: dummy numbers, only matter for cost estimation
wafersize = 300
hscribe = 0.1
vscribe = 0.1
edgemargin = 2

pdkdir = os.path.join('lambdapdk', 'interposer', 'base')

pdk = siliconcompiler.PDK(process, package='lambdapdk')
register_data_source(pdk)

# process name
pdk.set('pdk', process, 'foundry', foundry)
pdk.set('pdk', process, 'node', node)
pdk.set('pdk', process, 'version', 'v0.0.1')
pdk.set('pdk', process, 'stackup', stackups)
pdk.set('pdk', process, 'wafersize', wafersize)
pdk.set('pdk', process, 'edgemargin', edgemargin)
pdk.set('pdk', process, 'scribe', (hscribe, vscribe))

# APR Setup
for stackup in stackups:
for tool in ('openroad', 'klayout', 'magic'):
pdk.set('pdk', process, 'aprtech', tool, stackup, libtype, 'lef',
pdkdir + f'/apr/{stackup}.lef')

pdk.set('pdk', process, 'minlayer', stackup, 'metal1')
pdk.set('pdk', process, 'maxlayer', stackup, 'topmetal')

# DRC Runsets
pdk.set('pdk', process, 'drc', 'runset', 'klayout', stackup, 'drc',
pdkdir + f'/setup/klayout/{stackup}.drc')

key = 'drc_params:drc'
pdk.add('pdk', process, 'var', 'klayout', stackup, key, 'input=<input>')
pdk.add('pdk', process, 'var', 'klayout', stackup, key, 'topcell=<topcell>')
pdk.add('pdk', process, 'var', 'klayout', stackup, key, 'report=<report>')
pdk.add('pdk', process, 'var', 'klayout', stackup, key, 'threads=<threads>')

# Layer map and display file
pdk.set('pdk', process, 'layermap', 'klayout', 'def', 'gds', stackup,
pdkdir + f'/apr/{stackup}.layermap')
pdk.set('pdk', process, 'display', 'klayout', stackup,
pdkdir + f'/setup/klayout/{stackup}.lyp')

pdk.set('pdk', process, 'aprtech', 'openroad', stackup, libtype, 'fill',
pdkdir + f'/dfm/openroad/{stackup}.fill.json')

# Openroad global routing grid derating
openroad_layer_adjustments = {
'metal1': 0.20,
'metal2': 0.20,
'metal3': 0.20,
'metal4': 0.20,
'metal5': 0.20,
'metal6': 0.20,
'topmetal': 0.20
}
for layer, adj in openroad_layer_adjustments.items():
if layer != 'topmetal' and int(layer[-1]) >= int(stackup[0]):
continue
pdk.set('pdk', process, 'var', 'openroad', f'{layer}_adjustment', stackup, adj)

pdk.set('pdk', process, 'var', 'openroad', 'rclayer_signal', stackup, 'metal2')
pdk.set('pdk', process, 'var', 'openroad', 'rclayer_clock', stackup, 'metal2')

pdk.set('pdk', process, 'var', 'openroad', 'pin_layer_vertical', stackup, 'metal2')
pdk.set('pdk', process, 'var', 'openroad', 'pin_layer_horizontal', stackup, 'metal3')

# PEX
for corner in ["minimum", "typical", "maximum"]:
pdk.set('pdk', process, 'pexmodel', 'openroad', stackup, corner,
pdkdir + '/pex/openroad/' + stackup + '.' + corner + '.tcl')

return pdk


#########################
if __name__ == "__main__":
pdk = setup()
pdk.write_manifest(f'{pdk.top()}.json')
pdk.check_filepaths()
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