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[flake8] | ||
max-line-length = 100 | ||
extend-exclude = build, dist, lambdapdk/gf180/base/klayout | ||
extend-exclude = build, dist, lambdapdk/gf180/base/setup/klayout | ||
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This is a refactored copy of the GLobalFoundries 180 library that is compatible with the Silicon Compiler Collection and industry practices. The golden version which might be updated fron time to time can be found at: | ||
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volare enable --pdk gf180mcu 3af133706e554a740cfe60f21e773d9eaa41838c | ||
gf180mcuA | ||
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https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/tree/bba05379e6de0e3f7ab818d9052a2dd80d9f5dea/flow/platforms/gf180 | ||
https://github.com/google/gf180mcu-pdk |
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import siliconcompiler | ||
from lambdapdk import register_data_source | ||
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#################################################### | ||
# PDK Setup | ||
#################################################### | ||
def setup(chip): | ||
''' | ||
... | ||
... Process Highlights: | ||
* ... | ||
PDK content: | ||
* ... | ||
More information: | ||
* ... | ||
Sources: | ||
* ... | ||
''' | ||
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foundry = 'globalfoundries' | ||
process = 'gf180' | ||
stackup = '5LM_1TM' | ||
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node = 180 | ||
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pdkdir = "lambdapdk/gf180/base/" | ||
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register_data_source(chip) | ||
pdk = siliconcompiler.PDK(chip, process, package='lambdapdk') | ||
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# process name | ||
pdk.set('pdk', process, 'foundry', foundry) | ||
pdk.set('pdk', process, 'node', node) | ||
pdk.set('pdk', process, 'stackup', stackup) | ||
pdk.set('pdk', process, 'wafersize', 200) | ||
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for stackup in ("3LM_1TM_6K", | ||
"3LM_1TM_9K", | ||
"3LM_1TM_11K", | ||
"3LM_1TM_30K", | ||
"4LM_1TM_6K", | ||
"4LM_1TM_9K", | ||
"4LM_1TM_11K", | ||
"4LM_1TM_30K", | ||
"5LM_1TM_9K", | ||
"5LM_1TM_11K", | ||
"6LM_1TM_9K"): | ||
for libtype in ("7t", "9t"): | ||
# APR Setup | ||
for tool in ('openroad', 'klayout', 'magic'): | ||
pdk.set('pdk', process, 'aprtech', tool, stackup, libtype, 'lef', | ||
pdkdir + f'/apr/gf180mcu_{stackup}_{libtype}_tech.lef') | ||
max_layer = int(stackup[0]) | ||
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pdk.set('pdk', process, 'minlayer', stackup, 'Metal1') | ||
pdk.set('pdk', process, 'maxlayer', stackup, f'Metal{max_layer}') | ||
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# Layer map and display file | ||
pdk.set('pdk', process, 'layermap', 'klayout', 'def', 'klayout', stackup, | ||
pdkdir + '/setup/klayout/tech/gf180mcu.lyt') | ||
pdk.set('pdk', process, 'display', 'klayout', stackup, | ||
pdkdir + '/setup/klayout/tech/gf180mcu.lyp') | ||
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# Openroad global routing grid derating | ||
openroad_layer_adjustments = { | ||
'Metal1': 0.0, | ||
'Metal2': 0.0, | ||
'Metal3': 0.0, | ||
'Metal4': 0.0, | ||
'Metal5': 0.0, | ||
'Metal6': 0.0, | ||
'MetalTop': 1.0 | ||
} | ||
for layer, adj in openroad_layer_adjustments.items(): | ||
pdk.set('pdk', process, 'var', 'openroad', f'{layer}_adjustment', stackup, str(adj)) | ||
if layer == pdk.get('pdk', process, 'maxlayer', stackup): | ||
break | ||
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if max_layer == 2: | ||
pdk.set('pdk', process, 'var', 'openroad', 'rclayer_signal', stackup, 'Metal2') | ||
pdk.set('pdk', process, 'var', 'openroad', 'rclayer_clock', stackup, 'Metal2') | ||
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pdk.set('pdk', process, 'var', 'openroad', 'pin_layer_vertical', stackup, 'Metal2') | ||
pdk.set('pdk', process, 'var', 'openroad', 'pin_layer_horizontal', stackup, 'Metal1') | ||
elif max_layer == 3: | ||
pdk.set('pdk', process, 'var', 'openroad', 'rclayer_signal', stackup, 'Metal2') | ||
pdk.set('pdk', process, 'var', 'openroad', 'rclayer_clock', stackup, 'Metal2') | ||
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pdk.set('pdk', process, 'var', 'openroad', 'pin_layer_vertical', stackup, 'Metal2') | ||
pdk.set('pdk', process, 'var', 'openroad', 'pin_layer_horizontal', stackup, 'Metal3') | ||
elif max_layer == 4: | ||
pdk.set('pdk', process, 'var', 'openroad', 'rclayer_signal', stackup, 'Metal2') | ||
pdk.set('pdk', process, 'var', 'openroad', 'rclayer_clock', stackup, 'Metal3') | ||
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pdk.set('pdk', process, 'var', 'openroad', 'pin_layer_vertical', stackup, 'Metal4') | ||
pdk.set('pdk', process, 'var', 'openroad', 'pin_layer_horizontal', stackup, 'Metal3') | ||
elif max_layer >= 5: | ||
pdk.set('pdk', process, 'var', 'openroad', 'rclayer_signal', stackup, 'Metal3') | ||
pdk.set('pdk', process, 'var', 'openroad', 'rclayer_clock', stackup, 'Metal4') | ||
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pdk.set('pdk', process, 'var', 'openroad', 'pin_layer_vertical', stackup, 'Metal4') | ||
pdk.set('pdk', process, 'var', 'openroad', 'pin_layer_horizontal', stackup, 'Metal3') | ||
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# PEX | ||
for corner in ["bst", "typ", "wst"]: | ||
if stackup in ('3LM_1TM_6K', '3LM_1TM_9K', '3LM_1TM_11K', '3LM_1TM_30K', '4LM_1TM_6K'): | ||
continue | ||
base_name = f'gf180mcu_1p{stackup.replace("L", "").lower()}_sp_smim_OPTB_{corner}' | ||
pdk.set('pdk', process, 'pexmodel', 'openroad', stackup, corner, | ||
pdkdir + '/pex/openroad/' + base_name + '.tcl') | ||
pdk.set('pdk', process, 'pexmodel', 'openroad-openrcx', stackup, corner, | ||
pdkdir + '/pex/openroad/' + base_name + '.rules') | ||
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return pdk | ||
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######################### | ||
if __name__ == "__main__": | ||
pdk = setup(siliconcompiler.Chip('<pdk>')) | ||
pdk.write_manifest(f'{pdk.top()}.json') | ||
pdk.check_filepaths() |
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