diff --git a/lambdapdk/asap7/__init__.py b/lambdapdk/asap7/__init__.py
index 448e75df..51032e59 100644
--- a/lambdapdk/asap7/__init__.py
+++ b/lambdapdk/asap7/__init__.py
@@ -73,6 +73,8 @@ def setup(chip):
# Klayout setup file
pdk.set('pdk', process, 'layermap', 'klayout', 'def', 'klayout', stackup,
pdkdir + '/setup/klayout/asap7.lyt')
+ pdk.set('pdk', process, 'layermap', 'klayout', 'def', 'gds', stackup,
+ pdkdir + '/apr/asap7.layermap')
pdk.set('pdk', process, 'display', 'klayout', stackup,
pdkdir + '/setup/klayout/asap7.lyp')
@@ -105,6 +107,12 @@ def setup(chip):
pdk.set('pdk', process, 'pexmodel', 'openroad-openrcx', stackup, 'typical',
pdkdir + '/pex/openroad/typical.rules')
+ # Hide the DIEAREA layer 235/*.
+ pdk.set('pdk', process, 'var', 'klayout', 'hide_layers', stackup, '235/0')
+ pdk.set('pdk', process, 'var', 'klayout', 'hide_layers', stackup, '235/5')
+ # Hide boundary layer
+ pdk.set('pdk', process, 'var', 'klayout', 'hide_layers', stackup, '100/0')
+
return pdk
diff --git a/lambdapdk/asap7/base/apr/asap7.layermap b/lambdapdk/asap7/base/apr/asap7.layermap
new file mode 100644
index 00000000..85856809
--- /dev/null
+++ b/lambdapdk/asap7/base/apr/asap7.layermap
@@ -0,0 +1,183 @@
+# BSD 3-Clause License
+#
+# Copyright 2020 Lawrence T. Clark, Vinay Vashishtha, or Arizona State
+# University
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# 1. Redistributions of source code must retain the above copyright notice,
+# this list of conditions and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# 3. Neither the name of the copyright holder nor the names of its
+# contributors may be used to endorse or promote products derived from this
+# software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+
+V0 PIN 18 251
+V0 LEFPIN 18 0
+V0 VIA 18 0
+M1 NET 19 0
+M1 SPNET 19 0
+M1 PIN 19 251
+M1 LEFPIN 19 0
+M1 VIA 19 0
+#NAME M1/NET 19 1
+NAME M1/SPNET 19 251
+NAME M1/PIN 19 251
+NAME M1/LEFPIN 19 251
+V1 PIN 21 251
+V1 LEFPIN 21 0
+V1 VIA 21 0
+M2 NET 20 0
+M2 SPNET 20 0
+M2 PIN 20 251
+M2 LEFPIN 20 0
+M2 VIA 20 0
+M2 LEFOBS 20 0
+#NAME M2/NET 20 1
+NAME M2/SPNET 20 251
+NAME M2/PIN 20 251
+NAME M2/LEFPIN 20 251
+V2 PIN 25 251
+V2 LEFPIN 25 0
+V2 VIA 25 0
+M3 NET 30 0
+M3 SPNET 30 0
+M3 PIN 30 251
+M3 LEFPIN 30 0
+M3 VIA 30 0
+M3 LEFOBS 30 0
+#NAME M3/NET 30 1
+NAME M3/SPNET 30 251
+NAME M3/PIN 30 251
+NAME M3/LEFPIN 30 251
+V3 PIN 35 251
+V3 LEFPIN 35 0
+V3 FILL 35 0
+V3 FILLOPC 35 0
+V3 VIA 35 0
+M4 NET 40 0
+M4 SPNET 40 0
+M4 PIN 40 251
+M4 LEFPIN 40 0
+M4 FILL 40 0
+M4 FILLOPC 40 0
+M4 VIA 40 0
+M4 LEFOBS 40 0
+#NAME M4/NET 40 1
+NAME M4/SPNET 40 251
+NAME M4/PIN 40 251
+NAME M4/LEFPIN 40 251
+V4 PIN 45 251
+V4 LEFPIN 45 0
+V4 FILL 45 0
+V4 FILLOPC 45 0
+V4 VIA 45 0
+M5 NET 50 0
+M5 SPNET 50 0
+M5 PIN 50 251
+M5 LEFPIN 50 0
+M5 FILL 50 0
+M5 FILLOPC 50 0
+M5 VIA 50 0
+M5 LEFOBS 50 0
+#NAME M5/NET 50 1
+NAME M5/SPNET 50 251
+NAME M5/PIN 50 251
+NAME M5/LEFPIN 50 251
+V5 PIN 55 251
+V5 LEFPIN 55 0
+V5 FILL 55 0
+V5 FILLOPC 55 0
+V5 VIA 55 0
+M6 NET 60 0
+M6 SPNET 60 0
+M6 PIN 60 251
+M6 LEFPIN 60 0
+M6 FILL 60 0
+M6 FILLOPC 60 0
+M6 VIA 60 0
+M6 LEFOBS 60 0
+#NAME M6/NET 60 1
+NAME M6/SPNET 60 251
+NAME M6/PIN 60 251
+NAME M6/LEFPIN 60 251
+V6 PIN 65 251
+V6 LEFPIN 65 0
+V6 FILL 65 0
+V6 FILLOPC 65 0
+V6 VIA 65 0
+M7 NET 70 0
+M7 SPNET 70 0
+M7 PIN 70 251
+M7 LEFPIN 70 0
+M7 FILL 70 0
+M7 FILLOPC 70 0
+M7 VIA 70 0
+M7 LEFOBS 70 0
+#NAME M7/NET 70 1
+NAME M7/SPNET 70 251
+NAME M7/PIN 70 251
+NAME M7/LEFPIN 70 251
+V7 PIN 75 251
+V7 LEFPIN 75 0
+V7 FILL 75 0
+V7 FILLOPC 75 0
+V7 VIA 75 0
+M8 NET 80 0
+M8 SPNET 80 0
+M8 PIN 80 251
+M8 LEFPIN 80 0
+M8 FILL 80 0
+M8 FILLOPC 80 0
+M8 VIA 80 0
+M8 LEFOBS 80 0
+#NAME M8/NET 80 1
+NAME M8/SPNET 80 251
+NAME M8/PIN 80 251
+NAME M8/LEFPIN 80 251
+V8 PIN 85 251
+V8 LEFPIN 85 0
+V8 FILL 85 0
+V8 FILLOPC 85 0
+V8 VIA 85 0
+M9 NET 90 0
+M9 SPNET 90 0
+M9 PIN 90 251
+M9 LEFPIN 90 0
+M9 FILL 90 0
+M9 FILLOPC 90 0
+M9 VIA 90 0
+M9 LEFOBS 90 0
+#NAME M9/NET 90 1
+NAME M9/SPNET 90 251
+NAME M9/PIN 90 251
+NAME M9/LEFPIN 90 251
+V9 PIN 95 251
+V9 LEFPIN 95 0
+V9 FILL 95 0
+V9 FILLOPC 95 0
+V9 VIA 95 0
+#NAME Pad/NET 95 1
+NAME Pad/SPNET 95 251
+NAME Pad/PIN 95 251
+NAME Pad/LEFPIN 95 251
+NAME COMP 101 0
+COMP ALL 101 0
+DIEAREA ALL 235 5
diff --git a/lambdapdk/asap7/base/setup/klayout/asap7.lyp b/lambdapdk/asap7/base/setup/klayout/asap7.lyp
index 6c12d25f..8075d7b6 100644
--- a/lambdapdk/asap7/base/setup/klayout/asap7.lyp
+++ b/lambdapdk/asap7/base/setup/klayout/asap7.lyp
@@ -1,3060 +1,1951 @@
- #e8f8f5
- #e8f8f5
+ false
+ #ffff00
+ #ffff00
0
0
- I1
-
+ C3
+ C18
true
true
false
-
+ 1
false
false
0
- 1 / 0 well drawing
+ well drawing - 1/0
- #e8f8f5
- #e8f8f5
+ false
+ #ffff00
+ #ffff00
0
0
- I3
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 1 / 251 well pin
+ well pin - 1/251
- #e8f6f3
- #e8f6f3
+ false
+ #00ff00
+ #00cc66
0
0
- I1
-
+ C24
+ C18
true
true
false
-
+ 1
false
false
0
- 2 / 0 fin drawing
+ fin drawing - 2/0
- #eafaf1
- #eafaf1
- 0
- 0
- I1
-
- true
- true
- false
-
- false
- false
- 0
- 7 / 0 Gate drawing
-
-
-
- #eafaf1
- #eafaf1
- 0
- 0
- I3
-
- true
- true
- false
-
- false
- false
- 0
- 7 / 251 Gate pin
-
-
-
- #eafaf1
- #eafaf1
- 0
- 0
- I5
-
- true
- true
- false
-
- false
- false
- 0
- 7 / 2 Gate label
-
-
-
- #eafaf1
- #eafaf1
- 0
- 0
- I7
-
- true
- true
- false
-
- false
- false
- 0
- 7 / 3 Gate net
-
-
-
- #e9f7ef
- #e9f7ef
+ false
+ #009aff
+ #009aff
0
0
- I1
-
+ C25
+ C17
true
true
false
-
+ 1
false
false
0
- 8 / 0 Dummy drawing
+ Dummy drawing - 8/0
- #ebf5fb
- #ebf5fb
- 0
- 0
- I1
-
- true
- true
- false
-
- false
- false
- 0
- 10 / 0 GCut drawing
-
-
-
- #eaf2f8
- #eaf2f8
- 0
- 0
- I1
-
- true
- true
- false
-
- false
- false
- 0
- 11 / 0 Active drawing
-
-
-
- #f5eef8
- #f5eef8
- 0
- 0
- I1
-
- true
- true
- false
-
- false
- false
- 0
- 12 / 0 Nselect drawing
-
-
-
- #f4ecf7
- #f4ecf7
- 0
- 0
- I1
-
- true
- true
- false
-
- false
- false
- 0
- 13 / 0 Pselect drawing
-
-
-
- #ebedef
- #ebedef
+ false
+ #ff8000
+ #ff8000
0
0
- I1
-
+ C24
+ C11
true
true
false
-
+ 3
false
false
0
- 16 / 0 LIG drawing
+ LIG drawing - 16/0
- #ebedef
- #ebedef
+ false
+ #ff8000
+ #ff8000
0
0
- I3
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 16 / 251 LIG pin
+ LIG pin - 16/251
- #ebedef
- #ebedef
+ false
+ #ff8000
+ #ff8000
0
0
- I5
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 16 / 2 LIG label
+ LIG label - 16/2
- #ebedef
- #ebedef
+ false
+ #ff8000
+ #ff8000
0
0
- I7
-
+ C24
+ C11
true
true
false
-
+ 3
false
false
0
- 16 / 3 LIG net
+ LIG net - 16/3
- #ebedef
- #ebedef
- 0
- 0
- I9
-
- true
- true
- false
-
- false
- false
- 0
- 16 / 4 LIG blockage
-
-
-
- #eaecee
- #eaecee
+ false
+ #ffff00
+ #ffff00
0
0
- I1
-
+ C25
+ C11
true
true
false
-
+ 3
false
false
0
- 17 / 0 LISD drawing
+ LISD drawing - 17/0
- #eaecee
- #eaecee
+ false
+ #ffff00
+ #ffff00
0
0
- I3
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 17 / 251 LISD pin
+ LISD pin - 17/251
- #eaecee
- #eaecee
+ false
+ #ffff00
+ #ffff00
0
0
- I5
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 17 / 2 LISD label
+ LISD label - 17/2
- #eaecee
- #eaecee
+ false
+ #ffff00
+ #ffff00
0
0
- I7
-
+ C25
+ C11
true
true
false
-
+ 3
false
false
0
- 17 / 3 LISD net
+ LISD net - 17/3
- #eaecee
- #eaecee
- 0
- 0
- I9
-
- true
- true
- false
-
- false
- false
- 0
- 17 / 4 LISD blockage
-
-
-
- #fef9e7
- #fef9e7
+ false
+ #ff00ff
+ #ff00ff
0
0
- I1
-
+ C25
+ C18
true
true
false
-
+ 1
false
- false
+ true
0
- 18 / 0 V0 drawing
+ V0 drawing - 18/0
- #fef9e7
- #fef9e7
+ false
+ #0000ff
+ #0000ff
0
0
- I3
-
+ C18
+ C18
true
true
false
-
+ 1
false
false
0
- 18 / 4 V0 blockage
-
+ M1 drawing - 19/0
+
- #fef9e7
- #fef9e7
+ false
+ #0000ff
+ #0000ff
0
0
- I5
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 18 / 251 V0 PIN
-
+ M1 pin - 19/251
+
- #fef5e7
- #fef5e7
+ false
+ #0000ff
+ #0000ff
0
0
I1
-
+ C18
true
true
false
-
+ 1
false
false
0
- 19 / 0 M1 drawing
-
+ M1 label - 19/2
+
- #fef5e7
- #fef5e7
+ false
+ #0000ff
+ #0000ff
0
0
- I3
-
+ C18
+ C18
true
true
false
-
+ 1
false
false
0
- 19 / 251 M1 pin
-
+ M1 net - 19/3
+
- #fef5e7
- #fef5e7
+ false
+ #0000ff
+ #0000ff
0
0
- I5
-
+ C18
+ C18
true
true
false
-
+ 1
false
false
0
- 19 / 2 M1 label
-
+ M1 blockage - 19/4
+
- #fef5e7
- #fef5e7
+ false
+ #ff8000
+ #ff8000
0
0
- I7
-
+ C25
+ C18
true
true
false
-
+ 1
false
- false
+ true
0
- 19 / 3 M1 net
-
+ V1 drawing - 21/0
+
- #fef5e7
- #fef5e7
+ false
+ #00ffff
+ #00ffff
0
0
- I9
-
+ C18
+ C18
true
true
false
-
+ 1
false
false
0
- 19 / 4 M1 blockage
-
+ M2 drawing - 20/0
+
- #fdf2e9
- #fdf2e9
+ false
+ #00ffff
+ #00ffff
0
0
I1
-
+ C18
true
true
false
-
+ 1
false
false
0
- 21 / 0 V1 drawing
-
+ M2 pin - 20/251
+
- #fdf2e9
- #fdf2e9
+ false
+ #00ffff
+ #00ffff
0
0
- I3
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 21 / 4 V1 blockage
-
+ M2 label - 20/2
+
- #fdf2e9
- #fdf2e9
+ false
+ #00ffff
+ #00ffff
0
0
- I5
-
+ C18
+ C18
true
true
false
-
+ 1
false
false
0
- 21 / 251 V1 PIN
-
+ M2 net - 20/3
+
- #fbeee6
- #fbeee6
+ false
+ #00ffff
+ #00ffff
0
0
I1
-
+ C18
true
true
false
-
+ 1
false
false
0
- 20 / 0 M2 drawing
-
+ M2 blockage - 20/4
+
- #fbeee6
- #fbeee6
+ false
+ #d9e6ff
+ #d9e6ff
0
0
- I3
-
+ C25
+ C18
true
true
false
-
+ 1
false
- false
+ true
0
- 20 / 251 M2 pin
-
+ V2 drawing - 25/0
+
- #fbeee6
- #fbeee6
+ false
+ #ffbff2
+ #ffbff2
0
0
- I5
-
+ C18
+ C18
true
true
false
-
+ 1
false
false
0
- 20 / 2 M2 label
-
+ M3 drawing - 30/0
+
- #fbeee6
- #fbeee6
+ false
+ #ffbff2
+ #ffbff2
0
0
- I7
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 20 / 3 M2 net
-
+ M3 pin - 30/251
+
- #fbeee6
- #fbeee6
+ false
+ #ffbff2
+ #ffbff2
0
0
- I9
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 20 / 4 M2 blockage
-
+ M3 label - 30/2
+
- #fdedec
- #fdedec
+ false
+ #ffbff2
+ #ffbff2
0
0
- I1
-
+ C18
+ C18
true
true
false
-
+ 1
false
false
0
- 25 / 0 V2 drawing
-
+ M3 net - 30/3
+
- #fdedec
- #fdedec
+ false
+ #ffbff2
+ #ffbff2
0
0
- I3
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 25 / 4 V2 blockage
-
+ M3 blockage - 30/4
+
- #fdedec
- #fdedec
+ false
+ #ffffcc
+ #ffffcc
0
0
- I5
-
+ C25
+ C18
true
true
false
-
+ 1
false
- false
+ true
0
- 25 / 251 V2 PIN
-
+ V3 drawing - 35/0
+
- #f9ebea
- #f9ebea
+ false
+ #c08040
+ #c08040
0
0
- I1
-
+ C25
+ C18
true
true
false
-
+ 1
false
false
0
- 30 / 0 M3 drawing
-
+ M4 drawing - 40/0
+
- #f9ebea
- #f9ebea
+ false
+ #c08040
+ #c08040
0
0
- I3
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 30 / 251 M3 pin
-
+ M4 pin - 40/251
+
- #f9ebea
- #f9ebea
+ false
+ #c08040
+ #c08040
0
0
- I5
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 30 / 2 M3 label
-
+ M4 label - 40/2
+
- #f9ebea
- #f9ebea
+ false
+ #c08040
+ #c08040
0
0
- I7
-
+ C25
+ C18
true
true
false
-
+ 1
false
false
0
- 30 / 3 M3 net
-
+ M4 net - 40/3
+
- #f9ebea
- #f9ebea
+ false
+ #c08040
+ #c08040
0
0
- I9
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 30 / 4 M3 blockage
-
+ M4 blockage - 40/4
+
- #fdfefe
- #fdfefe
+ false
+ #5e00e6
+ #5e00e6
0
0
- I1
-
+ C25
+ C18
true
true
false
-
+ 1
false
- false
+ true
0
- 35 / 0 V3 drawing
-
+ V4 drawing - 45/0
+
- #fdfefe
- #fdfefe
+ false
+ #39bfff
+ #39bfff
0
0
- I3
-
+ C25
+ C18
true
true
false
-
+ 1
false
false
0
- 35 / 4 V3 blockage
-
+ M5 drawing - 50/0
+
- #fdfefe
- #fdfefe
+ false
+ #39bfff
+ #39bfff
0
0
- I5
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 35 / 251 V3 PIN
-
+ M5 pin - 50/251
+
- #f8f9f9
- #f8f9f9
+ false
+ #39bfff
+ #39bfff
0
0
I1
-
+ C18
true
true
false
-
+ 1
false
false
0
- 40 / 0 M4 drawing
-
+ M5 label - 50/2
+
- #f8f9f9
- #f8f9f9
+ false
+ #39bfff
+ #39bfff
0
0
- I3
-
+ C25
+ C18
true
true
false
-
+ 1
false
false
0
- 40 / 251 M4 pin
-
+ M5 net - 50/3
+
- #f8f9f9
- #f8f9f9
+ false
+ #39bfff
+ #39bfff
0
0
- I5
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 40 / 2 M4 label
-
+ M5 blockage - 50/4
+
- #f8f9f9
- #f8f9f9
+ false
+ #00cc66
+ #00cc66
0
0
- I7
-
+ C25
+ C18
true
true
false
-
+ 1
false
- false
+ true
0
- 40 / 3 M4 net
-
+ V5 drawing - 55/0
+
- #f8f9f9
- #f8f9f9
+ false
+ #ff0000
+ #ff0000
0
0
- I9
-
+ C21
+ C18
true
true
false
-
+ 1
false
false
0
- 40 / 4 M4 blockage
-
+ M6 drawing - 60/0
+
- #f4f6f6
- #f4f6f6
+ false
+ #ff0000
+ #ff0000
0
0
I1
-
+ C18
true
true
false
-
+ 1
false
false
0
- 45 / 0 V4 drawing
-
+ M6 pin - 60/251
+
- #f4f6f6
- #f4f6f6
+ false
+ #ff0000
+ #ff0000
0
0
- I3
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 45 / 4 V4 blockage
-
+ M6 label - 60/2
+
- #f4f6f6
- #f4f6f6
+ false
+ #ff0000
+ #ff0000
0
0
- I5
-
+ C21
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true
true
false
-
+ 1
false
false
0
- 45 / 251 V4 PIN
-
+ M6 net - 60/3
+
- #f2f4f4
- #f2f4f4
+ false
+ #ff0000
+ #ff0000
0
0
I1
-
+ C18
true
true
false
-
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false
false
0
- 50 / 0 M5 drawing
-
+ M6 blockage - 60/4
+
- #f2f4f4
- #f2f4f4
+ false
+ #00ffff
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0
0
- I3
-
+ C25
+ C18
true
true
false
-
+ 1
false
- false
+ true
0
- 50 / 251 M5 pin
-
+ V6 drawing - 65/0
+
- #f2f4f4
- #f2f4f4
+ false
+ #e1b4fa
+ #e1b4fa
0
0
- I5
-
+ C9
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true
true
false
-
+ 1
false
false
0
- 50 / 2 M5 label
-
+ M7 drawing - 70/0
+
- #f2f4f4
- #f2f4f4
+ false
+ #e1b4fa
+ #e1b4fa
0
0
- I7
-
+ I1
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true
true
false
-
+ 1
false
false
0
- 50 / 3 M5 net
-
+ M7 pin - 70/251
+
- #f2f4f4
- #f2f4f4
+ false
+ #e1b4fa
+ #e1b4fa
0
0
- I9
-
+ I1
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true
true
false
-
+ 1
false
false
0
- 50 / 4 M5 blockage
-
+ M7 label - 70/2
+
- #d1f2eb
- #d1f2eb
+ false
+ #e1b4fa
+ #e1b4fa
0
0
- I1
-
+ C9
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true
true
false
-
+ 1
false
false
0
- 55 / 0 V5 drawing
-
+ M7 net - 70/3
+
- #d1f2eb
- #d1f2eb
+ false
+ #e1b4fa
+ #e1b4fa
0
0
- I3
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 55 / 4 V5 blockage
-
+ M7 blockage - 70/4
+
- #d1f2eb
- #d1f2eb
+ false
+ #ffffff
+ #ffffff
0
0
- I5
-
+ C25
+ C18
true
true
false
-
+ 1
false
- false
+ true
0
- 55 / 251 V5 PIN
-
+ V7 drawing - 75/0
+
- #d0ece7
- #d0ece7
+ false
+ #268c6b
+ #268c6b
0
0
- I1
-
+ C3
+ C18
true
true
false
-
+ 1
false
false
0
- 60 / 0 M6 drawing
-
+ M8 drawing - 80/0
+
- #d0ece7
- #d0ece7
+ false
+ #268c6b
+ #268c6b
0
0
- I3
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 60 / 251 M6 pin
-
+ M8 pin - 80/251
+
- #d0ece7
- #d0ece7
+ false
+ #268c6b
+ #268c6b
0
0
- I5
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 60 / 2 M6 label
-
+ M8 label - 80/2
+
- #d0ece7
- #d0ece7
+ false
+ #268c6b
+ #268c6b
0
0
- I7
-
+ C3
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true
true
false
-
+ 1
false
false
0
- 60 / 3 M6 net
-
+ M8 net - 80/3
+
- #d0ece7
- #d0ece7
+ false
+ #268c6b
+ #268c6b
0
0
- I9
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 60 / 4 M6 blockage
-
+ M8 blockage - 80/4
+
- #d5f5e3
- #d5f5e3
+ false
+ #bf4026
+ #bf4026
0
0
- I1
-
+ C25
+ C18
true
true
false
-
+ 1
false
- false
+ true
0
- 65 / 0 V6 drawing
-
+ V8 drawing - 85/0
+
- #d5f5e3
- #d5f5e3
+ false
+ #5e00e6
+ #5e00e6
0
0
- I3
-
+ C2
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true
true
false
-
+ 1
false
false
0
- 65 / 4 V6 blockage
-
+ M9 drawing - 90/0
+
- #d5f5e3
- #d5f5e3
+ false
+ #5e00e6
+ #5e00e6
0
0
- I5
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 65 / 251 V6 PIN
-
+ M9 pin - 90/251
+
- #d4efdf
- #d4efdf
+ false
+ #5e00e6
+ #5e00e6
0
0
I1
-
+ C18
true
true
false
-
+ 1
false
false
0
- 70 / 0 M7 drawing
-
+ M9 label - 90/2
+
- #d4efdf
- #d4efdf
+ false
+ #5e00e6
+ #5e00e6
0
0
- I3
-
+ C2
+ C18
true
true
false
-
+ 1
false
false
0
- 70 / 251 M7 pin
-
+ M9 net - 90/3
+
- #d4efdf
- #d4efdf
+ false
+ #5e00e6
+ #5e00e6
0
0
- I5
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 70 / 2 M7 label
-
+ M9 blockage - 90/4
+
- #d4efdf
- #d4efdf
+ false
+ #00ff00
+ #ffffff
0
0
- I7
-
+ I1
+ C18
true
true
false
-
+ 1
false
- false
+ true
0
- 70 / 3 M7 net
-
+ V9 drawing - 95/0
+
- #d4efdf
- #d4efdf
+ false
+ #ffbff2
+ #ffbff2
0
0
- I9
-
+ C21
+ C18
true
true
false
-
+ 1
false
false
0
- 70 / 4 M7 blockage
-
+ SDT drawing - 88/0
+
- #d6eaf8
- #d6eaf8
+ false
+ #78ffff
+ #78ffff
0
0
I1
-
+ C11
true
true
false
-
+ 3
false
false
0
- 75 / 0 V7 drawing
-
+ SRAMDRC drawing - 99/0
+
- #d6eaf8
- #d6eaf8
+ false
+ #00cc66
+ #00cc66
0
0
- I3
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 75 / 4 V7 blockage
-
+ SRAMVT drawing - 110/0
+
- #d6eaf8
- #d6eaf8
+ false
+ #9900e6
+ #9900e6
0
0
- I5
-
+ I1
+ C18
true
true
false
-
+ 1
false
false
0
- 75 / 251 V7 PIN
-
+ Die area - 235/5
+
- #d4e6f1
- #d4e6f1
+ false
+ #9900e6
+ #9900e6
0
0
I1
-
+ C18
true
true
false
-
+ 1
false
false
0
- 80 / 0 M8 drawing
-
+ Die area - 235/0
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-
- #d4e6f1
- #d4e6f1
- 0
- 0
- I3
-
- true
- true
- false
-
- false
- false
- 0
- 80 / 251 M8 pin
-
-
-
- #d4e6f1
- #d4e6f1
- 0
- 0
- I5
-
- true
- true
- false
-
- false
- false
- 0
- 80 / 2 M8 label
-
-
-
- #d4e6f1
- #d4e6f1
- 0
- 0
- I7
-
- true
- true
- false
-
- false
- false
- 0
- 80 / 3 M8 net
-
-
-
- #d4e6f1
- #d4e6f1
- 0
- 0
- I9
-
- true
- true
- false
-
- false
- false
- 0
- 80 / 4 M8 blockage
-
-
-
- #ebdef0
- #ebdef0
- 0
- 0
- I1
-
- true
- true
- false
-
- false
- false
- 0
- 85 / 0 V8 drawing
-
-
-
- #ebdef0
- #ebdef0
- 0
- 0
- I3
-
- true
- true
- false
-
- false
- false
- 0
- 85 / 4 V8 blockage
-
-
-
- #ebdef0
- #ebdef0
- 0
- 0
- I5
-
- true
- true
- false
-
- false
- false
- 0
- 85 / 251 V8 PIN
-
-
-
- #e8daef
- #e8daef
- 0
- 0
- I1
-
- true
- true
- false
-
- false
- false
- 0
- 90 / 0 M9 drawing
-
-
-
- #e8daef
- #e8daef
- 0
- 0
- I3
-
- true
- true
- false
-
- false
- false
- 0
- 90 / 251 M9 pin
-
-
-
- #e8daef
- #e8daef
- 0
- 0
- I5
-
- true
- true
- false
-
- false
- false
- 0
- 90 / 2 M9 label
-
-
-
- #e8daef
- #e8daef
- 0
- 0
- I7
-
- true
- true
- false
-
- false
- false
- 0
- 90 / 3 M9 net
-
-
-
- #e8daef
- #e8daef
- 0
- 0
- I9
-
- true
- true
- false
-
- false
- false
- 0
- 90 / 4 M9 blockage
-
-
-
- #d6dbdf
- #d6dbdf
- 0
- 0
- I1
-
- true
- true
- false
-
- false
- false
- 0
- 95 / 0 V9 drawing
-
-
-
- #d6dbdf
- #d6dbdf
- 0
- 0
- I3
-
- true
- true
- false
-
- false
- false
- 0
- 95 / 4 V9 blockage
-
-
-
- #d6dbdf
- #d6dbdf
- 0
- 0
- I5
-
- true
- true
- false
-
- false
- false
- 0
- 95 / 251 V9 PIN
-
-
-
- #d5d8dc
- #d5d8dc
- 0
- 0
- I1
-
- true
- true
- false
-
- false
- false
- 0
- 88 / 0 SDT drawing
-
-
-
- #d5d8dc
- #d5d8dc
- 0
- 0
- I3
-
- true
- true
- false
-
- false
- false
- 0
- 88 / 4 SDT blockage
-
-
-
- #fcf3cf
- #fcf3cf
- 0
- 0
- I1
-
- true
- true
- false
-
- false
- false
- 0
- 97 / 0 SLVT drawing
-
-
-
- #fdebd0
- #fdebd0
- 0
- 0
- I1
-
- true
- true
- false
-
- false
- false
- 0
- 98 / 0 LVT drawing
-
-
-
- #fae5d3
- #fae5d3
- 0
- 0
- I1
-
- true
- true
- false
-
- false
- false
- 0
- 99 / 0 SRAMDRC drawing
-
-
-
- #f6ddcc
- #f6ddcc
- 0
- 0
- I1
-
- true
- true
- false
-
- false
- false
- 0
- 100 / 0 BOUNDARY drawing
-
-
-
- #fadbd8
- #fadbd8
- 0
- 0
- I1
-
- true
- true
- false
-
- false
- false
- 0
- 101 / 0 TEXT drawing
-
-
-
- #f2d7d5
- #f2d7d5
- 0
- 0
- I1
-
- true
- true
- false
-
- false
- false
- 0
- 110 / 0 SRAMVT drawing
-
-
-
- #fbfcfc
- #fbfcfc
- 0
- 0
- I1
-
- true
- true
- false
-
- false
- false
- 0
- 3 / 251 P_SUB pin
-
-
-
- #f2f3f4
- #f2f3f4
- 0
- 0
- I1
-
- true
- true
- false
-
- false
- false
- 0
- 235 / 5 Die Area
-
-
-
- #80ff8d
- #80ff8d
- 0
- 0
- I5
-
- true
- true
- false
-
- false
- false
- 0
-
-
-
- GDS Layers
-
-
- *
-
- 1
-
-
-
-
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-
-
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- 5
- hLine
-
-
-
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- 7
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-
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- vLine2
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-
-
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- 9
- cross
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-
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- 10
- miniHatch
-
-
-
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- slash
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- 13
- halfslash
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-
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- backSlash
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- 15
- hZigZag
-
-
-
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-
- 16
- vZigZag
-
-
-
- .....*....*....*
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- 17
- rvZigZag
-
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-
- ................
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- 18
- hCurb
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-
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- 19
- vCurb
-
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-
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- 20
- brick
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- 21
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................
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................
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................
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................
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-
-
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................
................
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................
................
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................
................
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................
................
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................
................
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................
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................
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................
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................
................
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................
................
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................
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-
-
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-
-
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................
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................
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................
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................
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................
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................
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................
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................
................
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................
................
................
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................
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................
................
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...**......**...
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*.......*.......
.**......**.....
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......*.......*.
*......**......*
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- ..***......*....
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- ................
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- poly2p
+ 17
+ vline
+
+
+
+ *...*...*...*...
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+ 16
+ x
- **......**......
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................
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................
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................
................
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................
................
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+
+ 15
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+
+
................
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................
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- 35
- contp
+ 14
+ dagger
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- 36
- pplusp
+ 13
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+ ..****....****..
- 37
- wellp
+ 12
+ vCurb
- .*.*.*.*.*.*.*.*
- *.*.*.*.*.*.*.*.
- .*.*.*.*.*.*.*.*
- *.*.*.*.*.*.*.*.
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- *.*.*.*.*.*.*.*.
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- *.*.*.*.*.*.*.*.
- .*.*.*.*.*.*.*.*
- *.*.*.*.*.*.*.*.
- .*.*.*.*.*.*.*.*
- *.*.*.*.*.*.*.*.
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- *.*.*.*.*.*.*.*.
- .*.*.*.*.*.*.*.*
- *.*.*.*.*.*.*.*.
+ ................
+ ................
+ ...*****...*****
+ ...*...*...*...*
+ ...*...*...*...*
+ ****...*****...*
+ ................
+ ................
+ ................
+ ................
+ ...*****...*****
+ ...*...*...*...*
+ ...*...*...*...*
+ ****...*****...*
+ ................
+ ................
- 38
- checker1
+ 11
+ hCurb
- **..**..**..**..
- **..**..**..**..
- ..**..**..**..**
- ..**..**..**..**
- **..**..**..**..
- **..**..**..**..
- ..**..**..**..**
- ..**..**..**..**
- **..**..**..**..
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- ..**..**..**..**
- ..**..**..**..**
- **..**..**..**..
- **..**..**..**..
- ..**..**..**..**
- ..**..**..**..**
+ *....*....*.....
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- 39
- checker2
+ 10
+ vZigZag
- **.***.***.***.*
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- *.*.*.*.*.*.*.*.
+ **......**......
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+ *.......*.......
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+ .......*.......*
- 40
- invCross
+ 9
+ hZigZag
- ................................
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- ................................
- ................................
- ................................
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- ................................
- ........***....***...***........
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- .........**....***...**.........
- .........**....*.*...**.........
- .........***..**.**..**.........
- ..........**..**.**.**..........
- ..........**..**.**.**..........
- ..........**..**.**.**..........
- ..........**..*...*.**..........
- ...........***....***...........
- ...........***....***...........
- ...........***....***...........
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
+ *...*...*...*...
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+ ...*...*...*...*
- 41
- wellBp
+ 8
+ backSlash
- ................................
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- ................................
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- ................................
- ................................
- ................................
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- ................................
- ................................
- ...........**********...........
- ...........*.........*..........
- ...........*....................
- ...........*....................
- ...........*....................
- ...........*....................
- ...........*....*****...........
- ...........*........*...........
- ...........*........*...........
- ...........*........*...........
- ...........**********...........
+ ...*...*...*...*
+ ..*...*...*...*.
+ .*...*...*...*..
+ *...*...*...*...
+ ...*...*...*...*
+ ..*...*...*...*.
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+ *...*...*...*...
+ ...*...*...*...*
+ ..*...*...*...*.
+ .*...*...*...*..
+ *...*...*...*...
+ ...*...*...*...*
+ ..*...*...*...*.
+ .*...*...*...*..
+ *...*...*...*...
- 42
- wellvtg
+ 7
+ slash
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ...........*....................
- ...........*.......*............
- ...........*.......*............
- ...........*.......*............
- ...........*.......*............
- ...........*********............
- ...........*.......*............
- ...........*.......*............
- ...........*.......*............
- ...........*.......*............
- ...........*.......*............
+ ...*...*...*...*
+ ...*...*...*...*
+ ...*...*...*...*
+ ****************
+ ...*...*...*...*
+ ...*...*...*...*
+ ...*...*...*...*
+ ****************
+ ...*...*...*...*
+ ...*...*...*...*
+ ...*...*...*...*
+ ****************
+ ...*...*...*...*
+ ...*...*...*...*
+ ...*...*...*...*
+ ****************
- 43
- wellvth
+ 6
+ grid
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ...........*********............
- ...........*...*...*............
- ...............*................
- ...............*................
- ...............*................
- ...............*................
- ...............*................
- ...............*................
- ...............*................
- ...............*................
- ...............*................
+ *.......*.......
+ .*.....*.*.....*
+ ..*...*...*...*.
+ ...*.*.....*.*..
+ ....*.......*...
+ ...*.*.....*.*..
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+ ...*.*.....*.*..
+ ..*...*...*...*.
+ .*.....*.*.....*
- 44
- thickox
+ 5
+ cross
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ..............****..............
- ............********............
- ............**...***............
- ...........**.....***...........
- ...........**...................
- ...........**...................
- ...........**...................
- ...........**...................
- ...........**.....***...........
- ............**...***............
- ............*******.............
- ..............****..............
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
- ................................
+ ..*...*...*...*.
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+ ..*...*...*...*.
- 45
- cwellBp
+ 4
+ vLine
................
................
- .......**.......
- .......**.......
- .......**.......
- .......**.......
- ...**********...
................
+ ****************
+ ................
+ ................
+ ................
+ ****************
+ ................
+ ................
+ ................
+ ****************
................
- .....******.....
- ....*..**..*....
- ...*...**...*...
- .......**.......
- .......**.......
................
................
+ ****************
- 46
- capID
+ 3
+ hLine
................
+ ..*...*...*...*.
+ ................
+ *...*...*...*...
................
+ ..*...*...*...*.
................
+ *...*...*...*...
................
- ...*............
- ...*............
- ..*.*...........
- ..*.*...........
- ***.*..***......
- .....*.*........
- .....*.*........
- ......*.........
- ......*.........
+ ..*...*...*...*.
................
+ *...*...*...*...
................
+ ..*...*...*...*.
................
+ *...*...*...*...
- 47
- resID
+ 2
+ dots1
+ .*...*...*...*..
................
+ ...*...*...*...*
................
+ .*...*...*...*..
................
+ ...*...*...*...*
................
- ......*....*....
- ......**...*....
- ......*.*..*....
- ......*..*.*....
- ...****...****..
- ......*..*.*....
- ......*.*..*....
- ......**...*....
- ......*....*....
+ .*...*...*...*..
................
+ ...*...*...*...*
................
+ .*...*...*...*..
+ ................
+ ...*...*...*...*
................
- 48
- diodeID
-
-
-
- ****************
- ****************
- **.*.*.***.*.*.*
- ****************
- **.*.*.***.*.*.*
- ****************
- **.*.*.***.*.*.*
- ****************
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- ****************
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- ****************
- **.*.*.***.*.*.*
- ****************
-
- 49
- sgrid
+ 1
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- 1
+ 0
+
+ *...
+ 18
+ thinDots
+
***
- 2
- solid
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+ mLine
- ****..
- 3
- dashed
+ ***
+ 16
+ thick7
- *..
- 4
- dots
+ ***
+ 15
+ thick6
- ***..*..
- 5
- dashDot
+ ***
+ 14
+ thick5
- **..
- 6
- shortDash
+ ***
+ 13
+ thick4
- ****..**..
- 7
- doubleDash
+ ***.
+ 12
+ thick3Dash
- *...
+ ***
+ 11
+ thick3
+
+
+ ***
+ 10
+ thick2
+
+
+ **...*..
+ 9
+ shDashDot
+
+
+ ***
8
+ thickLine
+
+
+ *...
+ 7
hidden
-
- 0
-
+ ****..**..
+ 6
+ doubleDash
+
+
+ **..
+ 5
+ shortDash
+
+
+ ***..*..
+ 4
+ dashDot
+
+
+ *..
+ 3
+ dots
+
+
+ ****..
+ 2
+ dashed
+
+
+ ***
+ 1
+ solid
diff --git a/lambdapdk/asap7/base/setup/klayout/asap7.lyt b/lambdapdk/asap7/base/setup/klayout/asap7.lyt
index ed983e7c..dbf607e9 100644
--- a/lambdapdk/asap7/base/setup/klayout/asap7.lyt
+++ b/lambdapdk/asap7/base/setup/klayout/asap7.lyt
@@ -2,7 +2,7 @@
ASAP7
ASAP7 PDK
- 0.0001
+ 0.00025
true
@@ -18,14 +18,13 @@
true
- layer_map('well.drawing : 1/0';'fin.drawing : 2/0';'Gate.drawing : 7/0';'Dummy.drawing : 8/0';'GCut.drawing : 10/0';'Active.drawing : 11/0';'Nselect.drawing : 12/0';'Pselect.drawing : 13/0';'LIG.drawing : 16/0';'LISD.drawing : 17/0';'V0.drawing : 18/0';'M1.drawing : 19/0';'V1.drawing : 21/0';'M2.drawing : 20/0';'V2.drawing : 25/0';'M3.drawing : 30/0';'V3.drawing : 35/0';'M4.drawing : 40/0';'V4.drawing : 45/0';'M5.drawing : 50/0';'V5.drawing : 55/0';'M6.drawing : 60/0';'V6.drawing : 65/0';'M7.drawing : 70/0';'V7.drawing : 75/0';'M8.drawing : 80/0';'V8.drawing : 85/0';'M9.drawing : 90/0';'V9.drawing : 95/0';'SDT.drawing : 88/0';'SLVT.drawing : 97/0';'LVT.drawing : 98/0';'SRAMDRC.drawing : 99/0';'BOUNDARY.drawing : 100/0';'TEXT.drawing : 101/0';'SRAMVT. : 110/0';'well.pin : 1/251';'P_SUB.pin : 3/251';'Gate.pin : 7/251';'LIG.pin : 16/251';'LISD.pin : 17/251';'M1.pin : 19/251';'M2.pin : 20/251';'M3.pin : 30/251';'M4.pin : 40/251';'M5.pin : 50/251';'M6.pin : 60/251';'M7.pin : 70/251';'M8.pin : 80/251';'M9.pin : 90/251';'Gate.label : 7/2';'LIG.label : 16/2';'LISD.label : 17/2';'M1.label : 19/2';'M2.label : 20/2';'M3.label : 30/2';'M4.label : 40/2';'M5.label : 50/2';'M6.label : 60/2';'M7.label : 70/2';'M8.label : 80/2';'M9.label : 90/2';'Gate.net : 7/3';'LIG.net : 16/3';'LISD.net : 17/3';'M1.net : 19/3';'M2.net : 20/3';'M3.net : 30/3';'M4.net : 40/3';'M5.net : 50/3';'M6.net : 60/3';'M7.net : 70/3';'M8.net : 80/3';'M9.net : 90/3';'LIG.blockage : 16/4';'LISD.blockage : 17/4';'V0.blockage : 18/4';'M1.blockage : 19/4';'V1.blockage : 21/4';'M2.blockage : 20/4';'V2.blockage : 25/4';'M3.blockage : 30/4';'V3.blockage : 35/4';'M4.blockage : 40/4';'V4.blockage : 45/4';'M5.blockage : 50/4';'V5.blockage : 55/4';'M6.blockage : 60/4';'V6.blockage : 65/4';'M7.blockage : 70/4';'V7.blockage : 75/4';'M8.blockage : 80/4';'V8.blockage : 85/4';'M9.blockage : 90/4';'V9.blockage : 95/4';'SDT.blockage : 88/4';)
- 0.0001
+ 0.00025
true
#1
true
#1
true
- OUTLINE
+ DIEAREA
true
PLACEMENT_BLK
true
@@ -35,22 +34,18 @@
0
true
.PIN
- 2
- true
- .OBS
- 3
- true
- .BLK
- 4
+ 251
+ false
+ false
true
.LABEL
- 1
+ 2
true
0
- 0.0001
+ 0.00025
1
100
100
@@ -65,7 +60,7 @@
0
- 0.0001
+ 0.00025
layer_map()
true
false
@@ -99,25 +94,37 @@
- DrainSource,V0,M1
- DrainSource='1/0 - 8/0'
- V0='18/0'
- M1='19/0+19/2'
- V1='19/0'
- M2='20/0+20/2'
- V2='25/0'
- M3='30/0+30/2'
- V3='35/0'
- M4='40/0+40/2'
- V4='45/0'
- M5='50/0+50/2'
- V5='55/0'
- M6='60/0+60/2'
- V6='65/0'
- M7='70/0+70/2'
- V7='75/0'
- M8='80/0+80/2'
- V8='85/0'
- M9='90/0+90/2'
+ DrainSource,V0,M1
+ poly,V0,M1
+ M1,V1,M2
+ M2,V2,M3
+ M3,V3,M4
+ M4,V4,M5
+ M5,V5,M6
+ M6,V6,M7
+ M7,V7,M8
+ M8,V8,M9
+ M9,V9,Pad
+ DrainSource='1/0 - 9/0'
+ poly='9/0'
+ contact='18/0'
+ M1='19/0'
+ V1='21/0'
+ M2='20/0'
+ V2='25/0'
+ M3='30/0'
+ V3='35/0'
+ M4='40/0'
+ V4='45/0'
+ M5='50/0'
+ V5='55/0'
+ M6='60/0'
+ V6='65/0'
+ M7='70/0'
+ V7='75/0'
+ M8='80/0'
+ V8='85/0'
+ M9='90/0'
+ V9='95/0'