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v0.8.2

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@mr-c mr-c released this 02 May 09:58
· 72 commits to master since this release
71fd833

SIMDe 0.8.2

Summary

  • Start of RISCV64 optimized implementation using the RVV1.0 vector extension! Thank you @eric900115 @howjmay @zengdage
  • 62 of the ARM Neon intrinsics added in SIMDe 0.8.0 had to be removed for not exactly matching the specs and real hardware
    (from the FCVTZS/FCVTMS/FCVTPS/FCVTNS families). This brings us down from 100% coverage of the NEON functions to 99.07%.

For the entire project: 126 files changed, 5522 insertions(+), 2772 deletions(-)

For just the simde folder: 89 files changed, 4330 insertions(+), 2199 deletions(-)

Details

Implementation of Arm intrinsics

NEON

  • arm neon: disable some FCVTZS/FCVTMS/FCVTPS/FCVTNS family intrinsics 339ffe4 @mr-c
  • arm neon sm3: check constant range 3d34fcd @mr-c
  • arm 32 bits: native def fixes; workarounds for gcc 22900e6 @Cuda-Chen
  • x86 implementations: allow _m128 access from SSE 114c3cd @mr-c

WASM intrinsics

  • wasm x86 impl: some were incorrectly marked SSE instead of SSE2 fee149a @mr-c

x86 intrinsics

SVML

  • SSE is good enough for native m128i and m128d types & functions 9982b27 @mr-c

XOP

Arch support

arm / arm64

RISCV64

Compiler Specific

Clang

Emscripten

  • use __builtin_roundeven{f,} from version 3.1.43 onwards 4379740 @mr-c

MSVC

  • x86 test msvc: really disable warning 4799,4730 487507d @mr-c
  • sse2 MSVC _mm_pause implementaiton for x86 8d95f83 @mr-c
  • SSE is good enough for native m128i and m128d types & functions 9982b27 @mr-c

Testing with Docker/Podman & CI

Cirrus CI

GitHub Actions

Packit CI

Semaphore CI

  • stop testing on GCC 5 & 6, clang 3.9 & 4 due to forced upgrade to Ubuntu 20.04 9982f10 @mr-c

Misc

New Contributors

Full Changelog: v0.8.0...v0.8.2