Universal PatchGuard and Driver Signature Enforcement Disable

Javascript implementation of the Bitcoin protocol for any Bitcoin based coins, on server and inside browsers, discover and move/manage your coins by yourself: Bitcoin transactions made simple for standard or multisig wallets, segwit and bech32 are supported, create and send by your own your Bitcoin, Bitcoin Cash, Zcash, Litecoin, DOGE, Dash, etc…

Randomized Tensor Decompositions

A simple Rails app for exploring MDN Browser Compatibility Data

Binary Coded Decimal. Research project for use with SQL_NUMERIC_STRUCT datatype

Setup the Windows BCD and boot files from Linux or macOS.

Extracting the contents of Microsoft Windows Registry (hive) and display it as a colorful tree but mainly focused on parsing BCD files to extract WIM files path for PXE attacks.

Partitioning tool for MS Windows and Linux

Create Windows Boot BCD files on Linux

Build hp35 calc with Z80 cpu from scratch

gobcd: Golang int to BCD conversion library (fork of https://github.com/albenik/bcd)

Various small helper functions are useful for firmware development.

Verilog Codes for various digital circuits for labs at IIT Ropar, basic gates, adders & subtractors (half & full), ripple adders, multipliers and code converters.

Basic Implementation of Telephony BCD in pure GoLang

Fixed format/ISO 8583 message parsing tool; 1. Supports the message specifications of various card organizations (Visa/MasterCard/American Express/JCB/UnionPay/China UnionPay/Networked Clearing); 2. Supports the parsing of ISO 8583 subfields and their nested subfields; 3. Supports mapping of message field value types to Java types;

this source is Commercial bcd counter that built with Jk flip-flop in verilog

An assembly project converting Packed BCD (Binary Coded Decimal) values into binary format. It focuses on efficient data conversion algorithms optimized for speed in low-level programming.

A hardware-based teaching aid for students to get familiarized with sequential logic using Basys FPGA boards.

These are VHDL codes for 12Bit counter to 7segment output. contains binary to BCD converter base on double dabble algorithm.