digitalsystemdesign

Here are 6 public repositories matching this topic...

geekyprawins / MIT-24-CSE-LABS

Lab solutions of MIT Manipal CSE Dept. for Batch of 2024.

java distributed-systems hadoop algorithms parallel-computing embedded-systems linux-shell operating-system data-structures verilog mapreduce cprogramming object-oriented-programming embedded-c parallel-programming internet-technologies computernetworks compilerdesign digitalsystemdesign

Updated Apr 11, 2024
C

sourabhshenoy04 / synch_mod12_counter

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Date of Respository Creation: 05/08/2023. This project was undertaken as a part of 4th semester System Verilog Project.

systemverilog digitalsystemdesign

Updated Nov 13, 2023
SystemVerilog

Prometheus052404 / CIRCUIT

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DIGITAL CIRCUIT SIMULATOR - an OBJECT ORIENTED PROGRAMMING way of implemeting LOGIC GATES ICs

logicgates oops-in-cpp digitalsystemdesign

Updated Dec 18, 2024
C++

sudecakmak / Digital-Systems-Laboratory

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Projects I made in Digital System Lab. I used Logisim for my projects.

circuit logisim digitalsystemdesign digitalsystems

Updated Jan 25, 2023

gautamop01 / Digital-Systems-and-Design

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Learned as a part of CS210 course

digital vhdl ssd bcd fulladder mux system-programming xor dff halfadder demux clockdivider cs210 xnor dlatch adder-subtractor digitalsystemdesign digitalsystems codeconvertor

Updated Dec 18, 2022
VHDL

hooridahesh / IUT

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Most of the slides and exercises are my projects and manuscripts (★‿★)

data-mining sql-server database datastructures risk-analysis artificial-intelligence operating-system software-engineering datawarehouse software-testing proteus isfahan-university-of-technology codevision gametheory computer-networks strategic algorithmdesign computerengineering digitalsystemdesign

Updated Oct 12, 2024
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digitalsystemdesign

Here are 6 public repositories matching this topic...

geekyprawins / MIT-24-CSE-LABS

sourabhshenoy04 / synch_mod12_counter

Prometheus052404 / CIRCUIT

sudecakmak / Digital-Systems-Laboratory

gautamop01 / Digital-Systems-and-Design

hooridahesh / IUT

Improve this page

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