Litmus helps SREs and developers practice chaos engineering in a Cloud-native way. Chaos experiments are published at the ChaosHub (https://hub.litmuschaos.io). Community notes is at https://hackmd.io/a4Zu_sH4TZGeih-xCimi3Q

A complete open-source design-for-testing (DFT) Solution

FAN (fan-out-oriented) ATPG (Automatic Test Pattern Generation) and Fault Simulation command line tool

Hardware Formal Verification

Simple fault simulator

A serial and parallel logic fault simulator on gate level netlists.

This is a Combinational Circuit Logic Simulation Tool. There is a C++ version and a C version.

Source files and documentation for the final assignment of the "Testing and Fault Tolerance" course.

Fault Simulation | Parallel Fault Simulation | Deductive fault Simulation | Test Coverage

RiscV Environment for Simulation (R4VES) is a generic and modular framework that eases the grunt work required in order to perform pre/post-synthesis logic and fault simulation on RISC-V cores based on Model/QuestaSim and Z01X.

A fault simulator that adopts an algorithm called "GODFATHER" created by Pier Paolo Ucchino

Path-Oriented Decision Making (PODEM) algorithm for Automatic Test Pattern Generation (ATPG).