Digital control loop implementation of a dual-loop average current mode controller regulating the output voltage of a synchronous buck converter

Phase Shifted PWM Output Configuration Example for dsPIC33CK-MP devices

Main and Secondary core MPLABx projects for 11kW Totem Pole Demonstration Application Platform

Chopped PWM Output using Combinatorial Logic Configuration Example for dsPIC33CK-MP devices

DAC Slope Compensation Ramp Output Configuration Example for dsPIC33CK-MP devices

Upon receipt on external trigger on pin 3 of J4, measure 3x phase voltages with ADC, then send 3 readings with checksum over isolation barrier via 2 wire SPI

Digital control loop implementation of a simple voltage mode controller regulating the output voltage of a synchronous buck converter

Digital control loop implementation of a simple peak current mode controller regulating the output voltage of a synchronous buck converter

Two phase interleaved 50W LLC converter with digitally implemented voltage mode control and phase current balancing.

Digital control loop implementation of a simple voltage mode controller regulating the output voltage of an asynchronous boost converter

Independent PWM Output Configuration Example for dsPIC33CK-MP devices

Multi-channel PWM Synchronization Output Configuration Example for dsPIC33CK-MP devices

PWM based ADC Trigger Configuration Example for dsPIC33CK-MP devices

Push-Pull PWM Output Configuration Example for dsPIC33CK-MP devices

Firmware for EPC9143 300W 16th Brick Power Module Reference Design featuring advanced type IV voltage mode control with high-speed PWM steering

Fault-Triggered PWM Shut Down Configuration Example for dsPIC33CK-MP devices

Digital control loop implementation of a simple voltage mode controller regulating the output voltage of a 4-switch buck-boost converter

4:1 Fixed Conversion Rate, 1 MHz Operation Firmware Example