6T SRAM memory cell design and analysis using LTspice. Calculated noise margin, conducted Vdd scaling analysis, and analyzed Data Retention Voltage parameter for design optimization.

Repositório dedicado as disciplinas lecionadas pelo Professor Giuliano Bertoti

The project begins with describing a digital circuit using VHDL and Xilinx Vivado 2018.3. It then optimizes the circuit using low-power techniques. Various strategies such as registering, clock gating, and a hybrid approach are tested to find the best solution.

.m, .MAT, .PDF, .XLS files for "Canonical host-pathogen tradeoffs subverted by mutations with dual benefits"

Tradeoff analysis for flood adaptation pathways in Ortley Beach, New Jersey

This repository contains the resources and codebase for a research project aimed at predicting breast cancer cases using data from the KNUST hospital.