| Seal5 | LLVM 17 | LLVM 18 | LLVM 19 | Comment |
|---|---|---|---|---|
v0.1.0 |
✅ (llvmorg-17.0.6) |
❌ | ❌ | Limited support! |
v0.1.1 ... v0.1.4 |
❓ | ✅ (llvmorg-18.1.0-rc3) |
❌ | |
TODO |
❓ | ❓ | ✅ (llvmorg-19.1.3) |
To be released! |
(Last updated: 30.10.2024)
Legend
y: yes
(y): partially yes
n: no
(n): partially no
f: filtered/excluded
?: unknown
Notes
^1: commented out
^2: not planned/too specific
^3: due to tablegen freeze
Table
| Mnemonic | Extension | Group | Sub-Group | CDSL written? | Assembly support | Intrinsics support | Patterns support | Assembly tests | Intrinsics tests | Codegen tests |
|---|---|---|---|---|---|---|---|---|---|---|
| cv.lb rD, Imm(rs1!) | XCoreVMem | Load Operations | Register-Immediate Loads with Post-Increment | y | ? | n | n | |||
| cv.lbu rD, Imm(rs1!) | XCoreVMem | Load Operations | Register-Immediate Loads with Post-Increment | y | ? | n | n | |||
| cv.lh rD, Imm(rs1!) | XCoreVMem | Load Operations | Register-Immediate Loads with Post-Increment | y | ? | n | n | |||
| cv.lhu rD, Imm(rs1!) | XCoreVMem | Load Operations | Register-Immediate Loads with Post-Increment | y | ? | n | n | |||
| cv.lw rD, Imm(rs1!) | XCoreVMem | Load Operations | Register-Immediate Loads with Post-Increment | y | ? | n | n | |||
| cv.lb rD, rs2(rs1!) | XCoreVMem | Load Operations | Register-Register Loads with Post-Increment | y | ? | n | n | |||
| cv.lbu rD, rs2(rs1!) | XCoreVMem | Load Operations | Register-Register Loads with Post-Increment | y | ? | n | n | |||
| cv.lh rD, rs2(rs1!) | XCoreVMem | Load Operations | Register-Register Loads with Post-Increment | y | ? | n | n | |||
| cv.lhu rD, rs2(rs1!) | XCoreVMem | Load Operations | Register-Register Loads with Post-Increment | y | ? | n | n | |||
| cv.lw rD, rs2(rs1!) | XCoreVMem | Load Operations | Register-Register Loads with Post-Increment | y | ? | n | n | |||
| cv.lb rD, rs2(rs1) | XCoreVMem | Load Operations | Register-Register Loads | y | ? | n | n | |||
| cv.lbu rD, rs2(rs1) | XCoreVMem | Load Operations | Register-Register Loads | y | ? | n | n | |||
| cv.lh rD, rs2(rs1) | XCoreVMem | Load Operations | Register-Register Loads | y | ? | n | n | |||
| cv.lhu rD, rs2(rs1) | XCoreVMem | Load Operations | Register-Register Loads | y | ? | n | n | |||
| cv.lw rD, rs2(rs1) | XCoreVMem | Load Operations | Register-Register Loads | y | ? | n | n | |||
| cv.sb rs2, Imm(rs1!) | XCoreVMem | Store Operations | Register-Immediate Stores with Post-Increment | y | ? | n | n | |||
| cv.sh rs2, Imm(rs1!) | XCoreVMem | Store Operations | Register-Immediate Stores with Post-Increment | y | ? | n | n | |||
| cv.sw rs2, Imm(rs1!) | XCoreVMem | Store Operations | Register-Immediate Stores with Post-Increment | y | ? | n | n | |||
| cv.sb rs2, rs3(rs1!) | XCoreVMem | Store Operations | Register-Register Stores with Post-Increment | y | ? | n | n | |||
| cv.sh rs2, rs3(rs1!) | XCoreVMem | Store Operations | Register-Register Stores with Post-Increment | y | ? | n | n | |||
| cv.sw rs2, rs3(rs1!) | XCoreVMem | Store Operations | Register-Register Stores with Post-Increment | y | ? | n | n | |||
| cv.sb rs2, rs3(rs1) | XCoreVMem | Store Operations | Register-Register Stores | y | ? | n | n | |||
| cv.sh rs2 rs3(rs1) | XCoreVMem | Store Operations | Register-Register Stores | y | ? | n | n | |||
| cv.sw rs2, rs3(rs1) | XCoreVMem | Store Operations | Register-Register Stores | y | ? | n | n | |||
| cv.elw rD, Imm(rs1) | ? | Event Load Instructions | Load Operations | n ^2 | n | n | n | |||
| cv.starti L, uimmL | XCoreVHwlp | Hardware Loops | Long Hardware Loop Setup instructions | y | n ^2 | n | n | |||
| cv.start L, rs1 | XCoreVHwlp | Hardware Loops | Long Hardware Loop Setup instructions | y | n ^2 | n | n | |||
| cv.endi L, uimmL | XCoreVHwlp | Hardware Loops | Long Hardware Loop Setup instructions | y | n ^2 | n | n | |||
| cv.end L, rs1 | XCoreVHwlp | Hardware Loops | Long Hardware Loop Setup instructions | y | n ^2 | n | n | |||
| cv.counti L, uimmL | XCoreVHwlp | Hardware Loops | Long Hardware Loop Setup instructions | y | n ^2 | n | n | |||
| cv.count L, rs1 | XCoreVHwlp | Hardware Loops | Long Hardware Loop Setup instructions | y | n ^2 | n | n | |||
| cv.setupi L, uimmL, uimmS | XCoreVHwlp | Hardware Loops | Short Hardware Loop Setup Instructions | y | n ^2 | n | n | |||
| cv.setup L, rs1, uimmL | XCoreVHwlp | Hardware Loops | Short Hardware Loop Setup Instructions | y | n ^2 | n | n | |||
| cv.extract rD, rs1, Is3, Is2 | XCoreVAlu | ALU | Bit Manipulation Operations | y | y | n | y | |||
| cv.extractu rD, rs1, Is3, Is2 | XCoreVAlu | ALU | Bit Manipulation Operations | y | y | n | y | |||
| cv.extractr rD, rs1, rs2 | XCoreVAlu | ALU | Bit Manipulation Operations | y | y | n | y | |||
| cv.extractur rD, rs1, rs2 | XCoreVAlu | ALU | Bit Manipulation Operations | y | y | n | y | |||
| cv.insert rD, rs1, Is3, Is2 | XCoreVAlu | ALU | Bit Manipulation Operations | n | n | n | n | |||
| cv.insertr rD, rs1, rs2 | XCoreVAlu | ALU | Bit Manipulation Operations | n | n | n | n | |||
| cv.bclr rD, rs1, Is3, Is2 | XCoreVAlu | ALU | Bit Manipulation Operations | n | n | n | n | |||
| cv.bclrr rD, rs1, rs2 | XCoreVAlu | ALU | Bit Manipulation Operations | n | n | n | n | |||
| cv.bset rD, rs1, Is3, Is2 | XCoreVAlu | ALU | Bit Manipulation Operations | n | n | n | n | |||
| cv.bsetr rD, rs1, rs2 | XCoreVAlu | ALU | Bit Manipulation Operations | n | n | n | n | |||
| cv.ff1 rD, rs1 | XCoreVAlu | ALU | Bit Manipulation Operations | n | n | n | n | |||
| cv.fl1 rD, rs1 | XCoreVAlu | ALU | Bit Manipulation Operations | n | n | n | n | |||
| cv.clb rD, rs1 | XCoreVAlu | ALU | Bit Manipulation Operations | (n) ^1 | n | n | n | |||
| cv.cnt rD, rs1 | XCoreVAlu | ALU | Bit Manipulation Operations | n | n | n | n | |||
| cv.ror rD, rs1, rs2 | XCoreVAlu | ALU | Bit Manipulation Operations | n | n | n | n | |||
| cv.bitrev rD, rs1, Is3, Is2 | XCoreVAlu | ALU | Bit Manipulation Operations | n | n | n | n | |||
| cv.abs rD, rs1 | XCoreVAlu | ALU | General ALU Operations | y | n | n | n | y | y | |
| cv.slet rD, rs1, rs2 | XCoreVAlu | ALU | General ALU Operations | y | f | f | f | |||
| cv.sletu rD, rs1, rs2 | XCoreVAlu | ALU | General ALU Operations | y | f | f | f | |||
| cv.min rD, rs1, rs2 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | y | ||
| cv.minu rD, rs1, rs2 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | y | ||
| cv.max rD, rs1, rs2 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | y | ||
| cv.maxu rD, rs1, rs2 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | y | ||
| cv.exths rD, rs1 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | |||
| cv.exthz rD, rs1 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | |||
| cv.extbs rD, rs1 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | |||
| cv.extbz rD, rs1 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | |||
| cv.clip rD, rs1, Is2 | XCoreVAlu | ALU | General ALU Operations | y | y | n | n | |||
| cv.clipu rD, rs1, Is2 | XCoreVAlu | ALU | General ALU Operations | y | f ^3 | f | f | |||
| cv.clipr rD, rs1, rs2 | XCoreVAlu | ALU | General ALU Operations | y | f ^3 | f | f | |||
| cv.clipur rD, rs1, rs2 | XCoreVAlu | ALU | General ALU Operations | y | f ^3 | f | f | |||
| cv.addN rD, rs1, rs2, Is3 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | |||
| cv.adduN rD, rs1, rs2, Is3 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | |||
| cv.addRN rD, rs1, rs2, Is3 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | |||
| cv.adduRN rD, rs1, rs2, Is3 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | |||
| cv.subN rD, rs1, rs2, Is3 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | y | ||
| cv.subuN rD, rs1, rs2, Is3 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | y | ||
| cv.subRN rD, rs1, rs2, Is3 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | |||
| cv.subuRN rD, rs1, rs2, Is3 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | |||
| cv.addNr rD, rs1, rs2 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | |||
| cv.adduNr rD, rs1, rs2 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | |||
| cv.addRNr rD, rs1, rs2 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | |||
| cv.adduRNr rD, rs1, rs2 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | |||
| cv.subNr rD, rs1, rs2 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | |||
| cv.subuNr rD, rs1, rs2 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | |||
| cv.subRNr rD, rs1, rs2 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | |||
| cv.subuRNr rD, rs1, rs2 | XCoreVAlu | ALU | General ALU Operations | y | y | n | y | |||
| cv.beqimm rs1, Imm5, Imm12 | XCoreVAlu | ALU | Immediate Branching Operations | y | ? | n | n | |||
| cv.bneimm rs1, Imm5, Imm12 | XCoreVAlu | ALU | Immediate Branching Operations | y | ? | n | n | |||
| cv.mac rD, rs1, rs2 | XCoreVMac | Multiply-Accumulate | 32-Bit x 32-Bit Multiplication Operations | y | y | n | y | y | ||
| cv.msu rD, rs1, rs2 | XCoreVMac | Multiply-Accumulate | 32-Bit x 32-Bit Multiplication Operations | y | y | n | y | y | ||
| cv.muluN rD, rs1, rs2, Is3 | XCoreVMac | Multiply-Accumulate | 16-Bit x 16-Bit Multiplication | y | y | n | y | |||
| cv.mulhhuN rD, rs1, rs2, Is3 | XCoreVMac | Multiply-Accumulate | 16-Bit x 16-Bit Multiplication | y | y | n | y | |||
| cv.mulsN rD, rs1, rs2, Is3 | XCoreVMac | Multiply-Accumulate | 16-Bit x 16-Bit Multiplication | y | y | n | y | |||
| cv.mulhhsN rD, rs1, rs2, Is3 | XCoreVMac | Multiply-Accumulate | 16-Bit x 16-Bit Multiplication | y | y | n | y | |||
| cv.muluRN rD, rs1, rs2, Is3 | XCoreVMac | Multiply-Accumulate | 16-Bit x 16-Bit Multiplication | y | f ^3 | f | f | |||
| cv.mulhhuRN rD, rs1, rs2, Is3 | XCoreVMac | Multiply-Accumulate | 16-Bit x 16-Bit Multiplication | y | y | n | y | |||
| cv.mulsRN rD, rs1, rs2, Is3 | XCoreVMac | Multiply-Accumulate | 16-Bit x 16-Bit Multiplication | y | f | f | f | |||
| cv.mulhhsRN rD, rs1, rs2, Is3 | XCoreVMac | Multiply-Accumulate | 16-Bit x 16-Bit Multiplication | y | f | f | f | |||
| cv.macuN rD, rs1, rs2, Is3 | XCoreVMac | Multiply-Accumulate | 16-Bit x 16-Bit Multiply-Accumulate | y | f | f | f | |||
| cv.machhuN rD, rs1, rs2, Is3 | XCoreVMac | Multiply-Accumulate | 16-Bit x 16-Bit Multiply-Accumulate | y | f | f | f | |||
| cv.macsN rD, rs1, rs2, Is3 | XCoreVMac | Multiply-Accumulate | 16-Bit x 16-Bit Multiply-Accumulate | y | f | f | f | |||
| cv.machhsN rD, rs1, rs2, Is3 | XCoreVMac | Multiply-Accumulate | 16-Bit x 16-Bit Multiply-Accumulate | y | y | n | y | |||
| cv.macuRN rD, rs1, rs2, Is3 | XCoreVMac | Multiply-Accumulate | 16-Bit x 16-Bit Multiply-Accumulate | y | y | n | n | |||
| cv.machhuRN rD, rs1, rs2, Is3 | XCoreVMac | Multiply-Accumulate | 16-Bit x 16-Bit Multiply-Accumulate | y | y | n | n | |||
| cv.macsRN rD, rs1, rs2, Is3 | XCoreVMac | Multiply-Accumulate | 16-Bit x 16-Bit Multiply-Accumulate | y | f | f | f | |||
| cv.machhsRN rD, rs1, rs2, Is3 | XCoreVMac | Multiply-Accumulate | 16-Bit x 16-Bit Multiply-Accumulate | y | f | f | f | |||
| cv.add.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.add.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.add.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.add.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.add.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.add.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.sub.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.sub.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.sub.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.sub.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.sub.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.sub.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.avg.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.avg.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.avg.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.avg.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.avg.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.avg.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.avgu.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.avgu.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.avgu.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.avgu.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.avgu.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.avgu.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.min.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.min.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.min.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.min.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.min.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.min.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.minu.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.minu.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.minu.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.minu.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.minu.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.minu.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.max.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.max.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.max.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.max.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.max.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.max.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.maxu.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.maxu.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.maxu.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.maxu.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.maxu.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.maxu.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.srl.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.srl.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.srl.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.srl.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.srl.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.srl.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.sra.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.sra.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.sra.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.sra.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.sra.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.sra.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.sll.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.sll.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.sll.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.sll.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.sll.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.sll.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.or.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.or.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.or.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.or.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.or.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.or.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.xor.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.xor.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.xor.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.xor.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.xor.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.xor.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.and.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.and.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.and.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.and.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.and.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.and.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.abs.h rD, rs1 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.abs.b rD, rs1 | XCoreVSimd | SIMD | SIMD ALU Operations | y | y | n | n | |||
| cv.extract.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Bit Manipulation Operations | y | y | n | n | |||
| cv.extract.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Bit Manipulation Operations | y | y | n | n | |||
| cv.extractu.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Bit Manipulation Operations | y | y | n | n | |||
| cv.extractu.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Bit Manipulation Operations | y | y | n | n | |||
| cv.insert.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Bit Manipulation Operations | y | y | n | n | |||
| cv.insert.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Bit Manipulation Operations | y | y | n | n | |||
| cv.dotup.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | (y) | n | (y) | |||
| cv.dotup.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | (y) | n | (y) | |||
| cv.dotup.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | (y) | n | (y) | |||
| cv.dotup.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | (y) | n | (y) | |||
| cv.dotup.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | (y) | n | (y) | |||
| cv.dotup.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.dotusp.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.dotusp.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.dotusp.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.dotusp.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.dotusp.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | (y) | n | (y) | |||
| cv.dotusp.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | (y) | n | (y) | |||
| cv.dotsp.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | (y) | n | (y) | |||
| cv.dotsp.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.dotsp.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | (y) | n | (y) | |||
| cv.dotsp.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | (y) | n | (y) | |||
| cv.dotsp.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | (y) | n | (y) | |||
| cv.dotsp.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.sdotup.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.sdotup.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | (y) | n | (y) | |||
| cv.sdotup.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | (y) | n | (y) | |||
| cv.sdotup.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.sdotup.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.sdotup.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.sdotusp.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.sdotusp.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.sdotusp.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.sdotusp.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.sdotusp.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.sdotusp.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.sdotsp.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.sdotsp.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.sdotsp.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.sdotsp.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.sdotsp.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.sdotsp.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Dot Product Instructions | y | f | f | f | |||
| cv.shuffle.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Shuffle and Pack Instructions | y | y | n | n | |||
| cv.shuffle.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Shuffle and Pack Instructions | y | y | n | n | |||
| cv.shuffle.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Shuffle and Pack Instructions | y | y | n | n | |||
| cv.shuffleI0.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Shuffle and Pack Instructions | y | y | n | n | |||
| cv.shuffleI1.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Shuffle and Pack Instructions | y | y | n | n | |||
| cv.shuffleI2.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Shuffle and Pack Instructions | y | y | n | n | |||
| cv.shuffleI3.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Shuffle and Pack Instructions | y | y | n | n | |||
| cv.shuffle2.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Shuffle and Pack Instructions | y | y | n | n | |||
| cv.shuffle2.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Shuffle and Pack Instructions | y | y | n | n | |||
| cv.pack rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Shuffle and Pack Instructions | y | f | f | f | |||
| cv.pack.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Shuffle and Pack Instructions | y | y | n | n | |||
| cv.packhi.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Shuffle and Pack Instructions | y | y | n | n | |||
| cv.packlo.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Shuffle and Pack Instructions | y | f | f | f | |||
| cv.cmpeq.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpeq.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpeq.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpeq.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpeq.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpeq.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpne.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpne.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpne.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpne.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpne.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpne.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpgt.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpgt.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpgt.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpgt.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpgt.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpgt.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpge.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpge.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpge.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpge.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpge.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpge.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmplt.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmplt.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmplt.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmplt.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmplt.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmplt.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmple.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmple.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmple.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmple.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmple.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmple.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpgtu.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpgtu.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpgtu.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpgtu.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpgtu.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpgtu.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpgeu.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpgeu.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpgeu.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpgeu.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpgeu.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpgeu.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpltu.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpltu.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpltu.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpltu.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpltu.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpltu.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpleu.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpleu.sc.h rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpleu.sci.h rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpleu.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpleu.sc.b rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cmpleu.sci.b rD, rs1, Imm6 | XCoreVSimd | SIMD | SIMD Comparison Operations | y | y | n | n | |||
| cv.cplxmul.r rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Complex-number Operations | y | y | n | n | |||
| cv.cplxmul.r.div2 rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Complex-number Operations | y | y | n | n | |||
| cv.cplxmul.r.div4 rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Complex-number Operations | y | y | n | n | |||
| cv.cplxmul.r.div8 rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Complex-number Operations | y | y | n | n | |||
| cv.cplxmul.i rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Complex-number Operations | y | y | n | n | |||
| cv.cplxmul.i.div2 rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Complex-number Operations | y | y | n | n | |||
| cv.cplxmul.i.div4 rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Complex-number Operations | y | y | n | n | |||
| cv.cplxmul.i.div8 rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Complex-number Operations | y | y | n | n | |||
| cv.cplxconj rD, rs1 | XCoreVSimd | SIMD | SIMD Complex-number Operations | y | y | n | n | |||
| cv.subrotmj rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Complex-number Operations | y | y | n | n | |||
| cv.subrotmj.div2 rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Complex-number Operations | y | y | n | n | |||
| cv.subrotmj.div4 rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Complex-number Operations | y | y | n | n | |||
| cv.subrotmj.div8 rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Complex-number Operations | y | y | n | n | |||
| cv.add.div2 rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Complex-number Operations | y | y | n | n | |||
| cv.add.div4 rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Complex-number Operations | y | y | n | n | |||
| cv.add.div8 rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Complex-number Operations | y | y | n | n | |||
| cv.sub.div2 rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Complex-number Operations | y | y | n | n | |||
| cv.sub.div4 rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Complex-number Operations | y | y | n | n | |||
| cv.sub.div8 rD, rs1, rs2 | XCoreVSimd | SIMD | SIMD Complex-number Operations | y | y | n | n |