lint code after intrinsics merge

seal5/backends/riscv_instr_info/writer.py

@@ -221,6 +221,7 @@ def gen_riscv_instr_info_str(instr, set_def):
     )
     return tablegen_str
 
+
 def gen_intrinsic_pattern(instr, intrinsic: IntrinsicDefn):
     pat = f"""class Pat_{instr.name}<SDPatternOperator OpNode, Instruction Inst>
 : Pat<(OpNode {instr.llvm_ins_str}), (Inst {instr.llvm_ins_str})>;
@@ -241,7 +242,13 @@ def main():
     parser.add_argument("--metrics", default=None, help="Output metrics to file")
     parser.add_argument("--index", default=None, help="Output index to file")
     parser.add_argument("--ext", type=str, default="td", help="Default file extension (if using --splitted)")
-    parser.add_argument("--no-add-intrinsics", dest='add_intrinsics', default=True, action='store_false', help="Suppress patterns for intrinsic functions")
+    parser.add_argument(
+        "--no-add-intrinsics",
+        dest="add_intrinsics",
+        default=True,
+        action="store_false",
+        help="Suppress patterns for intrinsic functions",
+    )
     args = parser.parse_args()
 
     # initialize logging

seal5/backends/riscv_intrinsics/writer.py

@@ -27,16 +27,15 @@
 def ir_type_to_text(ir_type: str):
     # needs fleshing out with all likely types
     # probably needs to take into account RISC-V bit width, e.g. does "Li" means 32 bit integer on a 128-bit platform?
-    if ir_type == 'i32':
-        return 'Li'
+    if ir_type == "i32":
+        return "Li"
     raise NotImplementedError(f'Unhandled ir_type "{ir_type}"')
 
 
 def build_target(arch: str, intrinsic: IntrinsicDefn):
-
     # Target couples intrinsic name to argument types and function behaviour
     # Start with return type if not void
-    arg_str = ''
+    arg_str = ""
     if intrinsic.ret_type:
         arg_str += ir_type_to_text(intrinsic.ret_type)
     for arg in intrinsic.args:
@@ -48,36 +47,39 @@ def build_target(arch: str, intrinsic: IntrinsicDefn):
 
 def ir_type_to_pattern(ir_type: str):
     # needs fleshing out with all likely types
-    if ir_type == 'i32':
-        return 'llvm_i32_ty'
+    if ir_type == "i32":
+        return "llvm_i32_ty"
     raise NotImplementedError(f'Unhandled ir_type "{ir_type}"')
 
 
 def build_attr(arch: str, intrinsic: IntrinsicDefn):
     uses_mem = False  # @todo
-    attr = f'  def int_riscv_{intrinsic.intrinsic_name} : Intrinsic<\n    ['
+    attr = f"  def int_riscv_{intrinsic.intrinsic_name} : Intrinsic<\n    ["
     if intrinsic.ret_type:
-        attr += f'{ir_type_to_pattern(intrinsic.ret_type)}'
-    attr += '],\n    ['
+        attr += f"{ir_type_to_pattern(intrinsic.ret_type)}"
+    attr += "],\n    ["
     for idx, arg in enumerate(intrinsic.args):
         if idx:
-            attr += ', '
+            attr += ", "
         attr += ir_type_to_pattern(arg.arg_type)
-    attr += '],\n'
-    attr += '    [IntrNoMem, IntrSpeculatable, IntrWillReturn]>;'
+    attr += "],\n"
+    attr += "    [IntrNoMem, IntrSpeculatable, IntrWillReturn]>;"
     return attr
 
 
 def build_emit(arch: str, intrinsic: IntrinsicDefn):
-    emit = (f'  case RISCV::BI__builtin_{arch}_{intrinsic.intrinsic_name}:\n'
-            f'    ID = Intrinsic::riscv_{intrinsic.intrinsic_name};\n'
-            f'    break;')
+    emit = (
+        f"  case RISCV::BI__builtin_{arch}_{intrinsic.intrinsic_name}:\n"
+        f"    ID = Intrinsic::riscv_{intrinsic.intrinsic_name};\n"
+        f"    break;"
+    )
     return emit
 
 
 @dataclass
 class PatchFrag:
     """Pairs patch contents to location to apply it"""
+
     patchee: str
     tag: str
     contents: str = ""
@@ -159,12 +161,12 @@ def main():
             if llvm_settings:
                 llvm_state = llvm_settings.state
                 if llvm_state:
-                    llvm_version = llvm_state.version   # unused today, but needed very soon
+                    llvm_version = llvm_state.version  # unused today, but needed very soon
         patch_frags = {
-            'target': PatchFrag(patchee='clang/include/clang/Basic/BuiltinsRISCV.def', tag='builtins_riscv'),
-            'attr': PatchFrag(patchee='llvm/include/llvm/IR/IntrinsicsRISCV.td', tag='intrinsics_riscv'),
-            'emit': PatchFrag(patchee='clang/lib/CodeGen/CGBuiltin.cpp', tag='cg_builtin')
-                      }
+            "target": PatchFrag(patchee="clang/include/clang/Basic/BuiltinsRISCV.def", tag="builtins_riscv"),
+            "attr": PatchFrag(patchee="llvm/include/llvm/IR/IntrinsicsRISCV.td", tag="intrinsics_riscv"),
+            "emit": PatchFrag(patchee="clang/lib/CodeGen/CGBuiltin.cpp", tag="cg_builtin"),
+        }
         for set_name, set_def in model["sets"].items():
             artifacts[set_name] = []
             metrics["n_sets"] += 1
@@ -175,19 +177,19 @@ def main():
             for intrinsic in settings.intrinsics.intrinsics:
                 metrics["n_success"] += 1
 
-                patch_frags['target'].contents += build_target(arch=ext_settings.get_arch(), intrinsic=intrinsic)
-                patch_frags['attr'].contents += build_attr(arch=ext_settings.get_arch(), intrinsic=intrinsic)
-                patch_frags['emit'].contents += build_emit(arch=ext_settings.get_arch(), intrinsic=intrinsic)
+                patch_frags["target"].contents += build_target(arch=ext_settings.get_arch(), intrinsic=intrinsic)
+                patch_frags["attr"].contents += build_attr(arch=ext_settings.get_arch(), intrinsic=intrinsic)
+                patch_frags["emit"].contents += build_emit(arch=ext_settings.get_arch(), intrinsic=intrinsic)
 
         for id, frag in patch_frags.items():
             contents = frag.contents
             if len(contents) > 0:
-                if id == 'target':
-                    contents = f'// {ext_settings.get_arch()}\n{contents}\n'
-                elif id == 'attr':
+                if id == "target":
+                    contents = f"// {ext_settings.get_arch()}\n{contents}\n"
+                elif id == "attr":
                     contents = f'let TargetPrefix = "riscv" in {{\n{contents}\n}}'
                 (root, ext) = os.path.splitext(out_path)
-                patch_path = root + '_' + id + ext
+                patch_path = root + "_" + id + ext
                 with open(patch_path, "w") as f:
                     f.write(contents)
                 key = frag.tag

seal5/flow.py

@@ -168,6 +168,7 @@ def add_test_cfg(tests_dir: Path):
 
 class Seal5Flow:
     """Seal5 Flow."""
+
     def __init__(
         self, directory: Optional[Path] = None, meta_dir: Optional[Union[str, Path]] = None, name: Optional[str] = None
     ):
@@ -787,7 +788,7 @@ def test(
             self.directory / "llvm" / "test",
             self.settings.get_llvm_build_dir(config=config, fallback=True, check=True),
             test_paths,
-            verbose=verbose
+            verbose=verbose,
         )
         if len(failing_tests) > 0:
             logger.error("%d tests failed: %s", len(failing_tests), ", ".join(failing_tests))

seal5/settings.py

@@ -159,9 +159,8 @@
             "sparse_checkout": False,
         },
     },
-    "intrinsics": {
-    },
- }
+    "intrinsics": {},
+}
 
 ALLOWED_YAML_TYPES = (int, float, str, bool)