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ops2.c
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ops2.c
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/****************************************************************************
*
* Realmode X86 Emulator Library
*
* Copyright (c) 1996-1999 SciTech Software, Inc.
* Copyright (c) David Mosberger-Tang
* Copyright (c) 1999 Egbert Eich
* Copyright (c) 2007-2017 SUSE LINUX GmbH; Author: Steffen Winterfeldt
*
* ========================================================================
*
* Permission to use, copy, modify, distribute, and sell this software and
* its documentation for any purpose is hereby granted without fee,
* provided that the above copyright notice appear in all copies and that
* both that copyright notice and this permission notice appear in
* supporting documentation, and that the name of the authors not be used
* in advertising or publicity pertaining to distribution of the software
* without specific, written prior permission. The authors makes no
* representations about the suitability of this software for any purpose.
* It is provided "as is" without express or implied warranty.
*
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*
* ========================================================================
*
* Description:
* Subroutines to implement the decoding and emulation of all the x86
* extended two-byte processor instructions.
*
****************************************************************************/
#include "include/x86emu_int.h"
/*----------------------------- Implementation ----------------------------*/
/****************************************************************************
PARAMETERS:
op2 - Instruction op code
REMARKS:
Handles illegal opcodes.
****************************************************************************/
static void x86emuOp2_illegal_op(x86emu_t *emu, u8 op2)
{
OP_DECODE("illegal opcode");
INTR_RAISE_UD(emu);
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x00
****************************************************************************/
static void x86emuOp2_opc_00(x86emu_t *emu, u8 op2)
{
int mod, rl, rh;
u16 *reg16;
u32 addr, val;
fetch_decode_modrm(emu, &mod, &rh, &rl);
switch(rh) {
case 0:
OP_DECODE("sldt ");
break;
case 1:
OP_DECODE("str ");
break;
case 2:
OP_DECODE("lldt ");
break;
case 3:
OP_DECODE("ltr ");
break;
case 4:
OP_DECODE("verr ");
break;
case 5:
OP_DECODE("verw ");
break;
default:
INTR_RAISE_UD(emu);
return;
}
if(mod == 3) {
reg16 = decode_rm_word_register(emu, rl);
switch(rh) {
case 0: /* sldt */
*reg16 = emu->x86.R_LDT;
break;
case 1: /* str */
*reg16 = emu->x86.R_TR;
break;
case 2: /* lldt */
x86emu_set_seg_register(emu, &emu->x86.ldt, *reg16);
break;
case 3: /* ltr */
emu->x86.R_TR = *reg16;
break;
case 4: /* verr */
if(*reg16 != 0) SET_FLAG(F_ZF);
break;
case 5: /* verw */
if(*reg16 != 0) SET_FLAG(F_ZF);
break;
}
}
else {
addr = decode_rm_address(emu, mod, rl);
switch(rh) {
case 0: /* sldt */
store_data_word(emu, addr, emu->x86.R_LDT);
break;
case 1: /* str */
store_data_word(emu, addr, emu->x86.R_TR);
break;
case 2: /* lldt */
val = fetch_data_word(emu, addr);
x86emu_set_seg_register(emu, &emu->x86.ldt, val);
break;
case 3: /* ltr */
val = fetch_data_word(emu, addr);
emu->x86.R_TR = val;
break;
case 4: /* verr */
val = fetch_data_word(emu, addr);
if(val != 0) SET_FLAG(F_ZF);
break;
case 5: /* verw */
val = fetch_data_word(emu, addr);
if(val != 0) SET_FLAG(F_ZF);
break;
}
}
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x01
****************************************************************************/
static void x86emuOp2_opc_01(x86emu_t *emu, u8 op2)
{
int mod, rl, rh;
u16 *reg16;
u32 base, addr, val;
u16 limit;
fetch_decode_modrm(emu, &mod, &rh, &rl);
if(mod == 3 && rh != 4 && rh != 6) {
INTR_RAISE_UD(emu);
}
else {
switch(rh) {
case 0: /* sgdt */
OP_DECODE("sgdt ");
addr = decode_rm_address(emu, mod, rl);
base = emu->x86.gdt.base;
if(!MODE_DATA32) base &= 0xffffff;
store_data_word(emu, addr, emu->x86.gdt.limit);
store_data_long(emu, addr + 2, base);
break;
case 1: /* sidt */
OP_DECODE("sidt ");
addr = decode_rm_address(emu, mod, rl);
base = emu->x86.idt.base;
if(!MODE_DATA32) base &= 0xffffff;
store_data_word(emu, addr, emu->x86.idt.limit);
store_data_long(emu, addr + 2, base);
break;
case 2: /* lgdt */
OP_DECODE("lgdt ");
addr = decode_rm_address(emu, mod, rl);
limit = fetch_data_word(emu, addr);
base = fetch_data_long(emu, addr + 2);
if(!MODE_DATA32) base &= 0xffffff;
emu->x86.gdt.limit = limit;
emu->x86.gdt.base = base;
break;
case 3: /* lidt */
OP_DECODE("lidt ");
addr = decode_rm_address(emu, mod, rl);
limit = fetch_data_word(emu, addr);
base = fetch_data_long(emu, addr + 2);
if(!MODE_DATA32) base &= 0xffffff;
emu->x86.idt.limit = limit;
emu->x86.idt.base = base;
break;
case 4:
OP_DECODE("smsw ");
if(mod == 3) {
reg16 = decode_rm_word_register(emu, rl);
*reg16 = emu->x86.R_CR0;
}
else {
addr = decode_rm_address(emu, mod, rl);
store_data_word(emu, addr, emu->x86.R_CR0);
}
break;
case 5:
INTR_RAISE_UD(emu);
break;
case 6:
OP_DECODE("lmsw ");
if(mod == 3) {
reg16 = decode_rm_word_register(emu, rl);
emu->x86.R_CR0 = (emu->x86.R_CR0 & ~0xffff) + *reg16;
}
else {
addr = decode_rm_address(emu, mod, rl);
val = fetch_data_word(emu, addr);
emu->x86.R_CR0 = (emu->x86.R_CR0 & ~0xffff) + val;
}
break;
case 7:
OP_DECODE("invlpg ");
decode_rm_address(emu, mod, rl);
break;
}
}
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x06
****************************************************************************/
static void x86emuOp2_clts(x86emu_t *emu, u8 op2)
{
OP_DECODE("clts");
emu->x86.R_CR0 &= ~8;
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x08
****************************************************************************/
static void x86emuOp2_invd(x86emu_t *emu, u8 op2)
{
OP_DECODE("invd");
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x09
****************************************************************************/
static void x86emuOp2_wbinvd(x86emu_t *emu, u8 op2)
{
OP_DECODE("wbinvd");
}
static void x86emuOp2_sse_enabled_check(x86emu_t *emu)
{
if (emu->x86.R_CR0 & CR0_EM || !(emu->x86.R_CR0 & CR0_MP))
INTR_RAISE_UD(emu);
if (!(emu->x86.R_CR4 & CR4_OSFXSR))
INTR_RAISE_UD(emu);
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x10-0x11 0xf,0x28-0x29 0xf,0x2b-0x2c
****************************************************************************/
static void x86emuOp2_SSEmovops(x86emu_t *emu, u8 op2)
{
int mod, rl, rh;
I128_reg_t *src, *dst, tmp;
u32 addr = 0;
switch(op2 & 0xfe) {
case 0x10:
OP_DECODE("movups ");
break;
case 0x28:
OP_DECODE("movaps ");
break;
case 0x2b:
OP_DECODE("movntps ");
break;
}
x86emuOp2_sse_enabled_check(emu);
fetch_decode_modrm(emu, &mod, &rh, &rl);
if(mod == 3) {
dst = decode_rm_sse_register(emu, rh);
OP_DECODE(",");
src = decode_rm_sse_register(emu, rl);
memcpy(dst, src, sizeof(*dst));
}
else {
if(!(op2 & 1)) {
dst = decode_rm_sse_register(emu, rh);
OP_DECODE(",");
addr = decode_rm_address(emu, mod, rl);
tmp = fetch_data_qlong(emu, addr);
/* check memory alignment if not movups */
if (((op2 & 0xfe) != 0x10) && (addr & 0xf)) {
INTR_RAISE_GP(emu, 0);
return;
}
memcpy(dst, &tmp, sizeof(*dst));
} else {
addr = decode_rm_address(emu, mod, rh);
OP_DECODE(",");
src = decode_rm_sse_register(emu, rl);
/* check memory alignment if not movups */
if(((op2 & 0xfe) != 0x10) && (addr & 0xf)) {
INTR_RAISE_GP(emu, 0);
return;
}
memcpy(&tmp, src, sizeof(tmp));
store_data_qlong(emu, addr, tmp);
}
}
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x12-0x13 0x0f,0x16-0x17
****************************************************************************/
static void x86emuOp2_SSEmovpackedops(x86emu_t *emu, u8 op2)
{
int mod, rl, rh, i;
I128_reg_t *src, *dst;
u32 addr;
fetch_decode_modrm(emu, &mod, &rh, &rl);
switch(op2) {
case 0x12:
if (mod == 3)
OP_DECODE("movhlps ");
else
OP_DECODE("movlps ");
break;
case 0x13:
OP_DECODE("movlps ");
break;
case 0x16:
if (mod == 3)
OP_DECODE("movhlps ");
else
OP_DECODE("movhps ");
break;
case 0x17:
OP_DECODE("movhps ");
break;
default:
INTR_RAISE_UD(emu);
break;
}
x86emuOp2_sse_enabled_check(emu);
if(mod == 3) {
dst = decode_rm_sse_register(emu, rh);
OP_DECODE(",");
src = decode_rm_sse_register(emu, rl);
for(i = 0; i < FP_SP_SIZE * 2; i++) {
if (op2 == 0x12) {
dst->reg[i] = src->reg[i + FP_SP_SIZE * 2];
} else if (op2 == 0x16) {
dst->reg[i+ FP_SP_SIZE * 2] = src->reg[i];
}
}
}else{
if (op2 & 1) {
addr = decode_rm_address(emu, mod, rl);
OP_DECODE(",");
src = decode_rm_sse_register(emu, rh);
for(i = 0; i < FP_SP_SIZE * 2; i++) {
if (op2 == 0x13) {
store_data_byte(emu, addr + i, src->reg[i]);
} else if (op2 == 0x17) {
store_data_byte(emu, addr + i, src->reg[i+FP_SP_SIZE*2]);
}
}
} else {
dst = decode_rm_sse_register(emu, rh);
OP_DECODE(",");
addr = decode_rm_address(emu, mod, rl);
for(i = 0; i < FP_SP_SIZE * 2; i++) {
if (op2 == 0x12) {
dst->reg[i] = fetch_data_byte(emu, addr + i);
} else if (op2 == 0x16) {
dst->reg[i+FP_SP_SIZE*2] = fetch_data_byte(emu, addr + i);
}
}
}
}
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x14-0x15
****************************************************************************/
static void x86emuOp2_SSEpackops(x86emu_t *emu, u8 op2)
{
int mod, rl, rh, off, i;
I128_reg_t *src, *dst, tmp, arith;
u32 addr;
switch(op2) {
case 0x14:
OP_DECODE("unpcklps ");
break;
case 0x15:
OP_DECODE("unpckhps ");
break;
default:
INTR_RAISE_UD(emu);
break;
}
x86emuOp2_sse_enabled_check(emu);
fetch_decode_modrm(emu, &mod, &rh, &rl);
if(mod == 3) {
dst = decode_rm_sse_register(emu, rh);
OP_DECODE(",");
src = decode_rm_sse_register(emu, rl);
} else {
dst = decode_rm_sse_register(emu, rh);
OP_DECODE(",");
addr = decode_rm_address(emu, mod, rl);
tmp = fetch_data_qlong(emu, addr);
src = &tmp;
}
if(op2 == 0x14) {
off = 0;
} else {
off = 2;
}
arith.reg[0] = dst->reg[off + 0];
arith.reg[1] = src->reg[off + 0];
arith.reg[2] = dst->reg[off + 1];
arith.reg[3] = src->reg[off + 1];
arith.reg[4] = dst->reg[off + 4];
arith.reg[5] = src->reg[off + 4];
arith.reg[6] = dst->reg[off + 5];
arith.reg[7] = src->reg[off + 5];
for(i = 0; i < FP_SP_SIZE; i++) {
dst->reg[i] = arith.reg[i];
}
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x18
****************************************************************************/
static void x86emuOp2_prefetch(x86emu_t *emu, u8 op2)
{
int mod, rl, rh;
fetch_decode_modrm(emu, &mod, &rh, &rl);
switch(rh) {
case 0:
OP_DECODE("prefetchnta ");
break;
case 1:
OP_DECODE("prefetcht0 ");
break;
case 2:
OP_DECODE("prefetcht1 ");
break;
case 3:
OP_DECODE("prefetcht2 ");
break;
default:
OP_DECODE("hint_nop ");
break;
}
if(mod == 3) {
if(MODE_DATA32) {
decode_rm_long_register(emu, rl);
}
else {
decode_rm_word_register(emu, rl);
}
}
else {
OP_DECODE("byte ");
decode_rm_address(emu, mod, rl);
}
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x19,0x1c-0x1e
****************************************************************************/
static void x86emuOp2_hint_nop(x86emu_t *emu, u8 op2)
{
int mod, rl, rh;
OP_DECODE("hint_nop ");
fetch_decode_modrm(emu, &mod, &rh, &rl);
if(mod == 3) {
if(MODE_DATA32) {
decode_rm_long_register(emu, rl);
}
else {
decode_rm_word_register(emu, rl);
}
}
else {
if(MODE_DATA32) {
OP_DECODE("dword ");
}
else {
OP_DECODE("word ");
}
decode_rm_address(emu, mod, rl);
}
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x1f
****************************************************************************/
static void x86emuOp2_nop(x86emu_t *emu, u8 op2)
{
int mod, rl, rh;
/*
* Basically the same as x86emuOp2_hint_nop() - but this is the officially
* documented opcode.
*/
OP_DECODE("nop ");
fetch_decode_modrm(emu, &mod, &rh, &rl);
if(mod == 3) {
if(MODE_DATA32) {
decode_rm_long_register(emu, rl);
}
else {
decode_rm_word_register(emu, rl);
}
}
else {
if(MODE_DATA32) {
OP_DECODE("dword ");
}
else {
OP_DECODE("word ");
}
decode_rm_address(emu, mod, rl);
}
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x20
****************************************************************************/
static void x86emuOp2_mov_word_RM_CRx(x86emu_t *emu, u8 op2)
{
int mod, rl, rh;
u32 *reg32;
OP_DECODE("mov ");
fetch_decode_modrm(emu, &mod, &rh, &rl);
if(mod == 3) {
reg32 = decode_rm_long_register(emu, rl);
OP_DECODE(",cr");
DECODE_HEX1(rh);
*reg32 = emu->x86.crx[rh];
}
else {
INTR_RAISE_UD(emu);
}
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x21
****************************************************************************/
static void x86emuOp2_mov_word_RM_DRx(x86emu_t *emu, u8 op2)
{
int mod, rl, rh;
u32 *reg32;
OP_DECODE("mov ");
fetch_decode_modrm(emu, &mod, &rh, &rl);
if(mod == 3) {
reg32 = decode_rm_long_register(emu, rl);
OP_DECODE(",dr");
DECODE_HEX1(rh);
*reg32 = emu->x86.drx[rh];
}
else {
INTR_RAISE_UD(emu);
}
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x22
****************************************************************************/
static void x86emuOp2_mov_word_CRx_RM(x86emu_t *emu, u8 op2)
{
int mod, rl, rh;
OP_DECODE("mov cr");
fetch_decode_modrm(emu, &mod, &rh, &rl);
DECODE_HEX1(rh);
OP_DECODE(",");
if(mod == 3) {
emu->x86.crx[rh] = *decode_rm_long_register(emu, rl);
}
else {
INTR_RAISE_UD(emu);
}
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x23
****************************************************************************/
static void x86emuOp2_mov_word_DRx_RM(x86emu_t *emu, u8 op2)
{
int mod, rl, rh;
OP_DECODE("mov dr");
fetch_decode_modrm(emu, &mod, &rh, &rl);
DECODE_HEX1(rh);
OP_DECODE(",");
if(mod == 3) {
emu->x86.drx[rh] = *decode_rm_long_register(emu, rl);
}
else {
INTR_RAISE_UD(emu);
}
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x30
****************************************************************************/
static void x86emuOp2_wrmsr(x86emu_t *emu, u8 op2)
{
unsigned u;
OP_DECODE("wrmsr");
u = emu->x86.R_ECX;
if(u >= X86EMU_MSRS) {
INTR_RAISE_UD(emu);
}
else {
if(emu->wrmsr) {
emu->wrmsr(emu);
}
}
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x31
****************************************************************************/
static void x86emuOp2_rdtsc(x86emu_t *emu, u8 op2)
{
OP_DECODE("rdtsc");
emu->x86.R_EAX = emu->x86.R_TSC;
emu->x86.R_EDX = emu->x86.R_TSC >> 32;
emu->x86.msr_perm[0x10] |= X86EMU_ACC_R;
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x32
****************************************************************************/
static void x86emuOp2_rdmsr(x86emu_t *emu, u8 op2)
{
unsigned u;
OP_DECODE("rdmsr");
u = emu->x86.R_ECX;
if(u >= X86EMU_MSRS) {
INTR_RAISE_UD(emu);
}
else {
if(emu->rdmsr) {
emu->rdmsr(emu);
}
}
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x33
****************************************************************************/
static void x86emuOp2_rdpmc(x86emu_t *emu, u8 op2)
{
// unsigned u;
OP_DECODE("rdpmc");
// u = emu->x86.R_ECX; // counter index
// not implemented
emu->x86.R_EDX = 0;
emu->x86.R_EAX = 0;
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x34
****************************************************************************/
static void x86emuOp2_sysenter(x86emu_t *emu, u8 op2)
{
OP_DECODE("sysenter");
// not implemented
INTR_RAISE_UD(emu);
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x35
****************************************************************************/
static void x86emuOp2_sysexit(x86emu_t *emu, u8 op2)
{
OP_DECODE("sysexit");
// not implemented
INTR_RAISE_UD(emu);
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x40-0x4f
****************************************************************************/
static void x86emuOp2_conditional_move(x86emu_t *emu, u8 op2)
{
int mod, rl, rh, noop = 0;
u16 *src16, *dst16;
u32 *src32, *dst32, addr;
OP_DECODE("cmov");
fetch_decode_modrm(emu, &mod, &rh, &rl);
switch(op2 & 0xf) {
case 0:
OP_DECODE("o ");
noop = !ACCESS_FLAG(F_OF);
break;
case 1:
OP_DECODE("no ");
noop = ACCESS_FLAG(F_OF);
break;
case 2:
OP_DECODE("c ");
noop = !ACCESS_FLAG(F_CF);
break;
case 3:
OP_DECODE("nc ");
noop = ACCESS_FLAG(F_CF);
break;
case 4:
OP_DECODE("z ");
noop = !ACCESS_FLAG(F_ZF);
break;
case 5:
OP_DECODE("nz ");
noop = ACCESS_FLAG(F_ZF);
break;
case 6:
OP_DECODE("be ");
noop = !ACCESS_FLAG(F_CF) && !ACCESS_FLAG(F_ZF);
break;
case 7:
OP_DECODE("nbe ");
noop = ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF);
break;
case 8:
OP_DECODE("s ");
noop = !ACCESS_FLAG(F_SF);
break;
case 9:
OP_DECODE("ns ");
noop = ACCESS_FLAG(F_SF);
break;
case 0xa:
OP_DECODE("p ");
noop = !ACCESS_FLAG(F_PF);
break;
case 0xb:
OP_DECODE("np ");
noop = ACCESS_FLAG(F_PF);
break;
case 0xc:
OP_DECODE("l ");
noop = ACCESS_FLAG(F_SF) == ACCESS_FLAG(F_OF);
break;
case 0xd:
OP_DECODE("nl ");
noop = ACCESS_FLAG(F_SF) != ACCESS_FLAG(F_OF);
break;
case 0xe:
OP_DECODE("le ");
noop = !ACCESS_FLAG(F_ZF) && (ACCESS_FLAG(F_SF) == ACCESS_FLAG(F_OF));
break;
case 0xf:
OP_DECODE("nle ");
noop = ACCESS_FLAG(F_ZF) || (ACCESS_FLAG(F_SF) != ACCESS_FLAG(F_OF));
break;
}
if(mod == 3) {
if(MODE_DATA32) {
dst32 = decode_rm_long_register(emu, rh);
OP_DECODE(",");
src32 = decode_rm_long_register(emu, rl);
if(!noop)
*dst32 = *src32;
}
else {
dst16 = decode_rm_word_register(emu, rh);
OP_DECODE(",");
src16 = decode_rm_word_register(emu, rl);
if(!noop)
*dst16 = *src16;
}
}
else {
if(MODE_DATA32) {
dst32 = decode_rm_long_register(emu, rh);
OP_DECODE(",");
addr = decode_rm_address(emu, mod, rl);
if(!noop)
*dst32 = fetch_data_long(emu, addr);
}
else {
dst16 = decode_rm_word_register(emu, rh);
OP_DECODE(",");
addr = decode_rm_address(emu, mod, rl);
if(!noop)
*dst16 = fetch_data_word(emu, addr);
}
}
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x54-57
****************************************************************************/
static void x86emuOp2_SSElogicalops(x86emu_t *emu, u8 op2)
{
int mod, rl, rh, i;
I128_reg_t *src, *dst, tmp;
u32 addr;
switch(op2) {
case 0x54:
OP_DECODE("andps ");
break;
case 0x55:
OP_DECODE("andnps ");
break;
case 0x56:
OP_DECODE("orps ");
break;
case 0x57:
OP_DECODE("xorps ");
break;
default:
INTR_RAISE_UD(emu);
break;
}
x86emuOp2_sse_enabled_check(emu);
fetch_decode_modrm(emu, &mod, &rh, &rl);
if(mod == 3) {
dst = decode_rm_sse_register(emu, rh);
OP_DECODE(",");
src = decode_rm_sse_register(emu, rl);
}
else {
dst = decode_rm_sse_register(emu, rh);
OP_DECODE(",");
addr = decode_rm_address(emu, mod, rl);
tmp = fetch_data_qlong(emu, addr);
src = &tmp;
}
for(i = 0; i < sizeof(dst->reg); i++) {
switch(op2) {
case 0x54:
dst->reg[i] &= src->reg[i];
break;
case 0x55:
dst->reg[i] &= ~src->reg[i];
break;
case 0x56:
dst->reg[i] |= src->reg[i];
break;
case 0x57:
dst->reg[i] ^= src->reg[i];
break;
}
}
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x80-0x8F
****************************************************************************/
static void x86emuOp2_long_jump(x86emu_t *emu, u8 op2)
{
s32 ofs;
u32 eip;
unsigned type = op2 & 0xf;
OP_DECODE("j");
decode_cond(emu, type);
if(MODE_DATA32) {
ofs = fetch_long(emu);
}
else {
ofs = (s16) fetch_word(emu);
}
eip = emu->x86.R_EIP + ofs;
if(!MODE_DATA32) eip &= 0xffff;
DECODE_HEX_ADDR(eip);
if(eval_condition(emu, type)) emu->x86.R_EIP = eip;