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Improved plots
gds #60: Commit 83dda6e pushed by wulffern
November 9, 2024 11:02 1m 54s main
November 9, 2024 11:02 1m 54s
Improved plots
docs #60: Commit 83dda6e pushed by wulffern
November 9, 2024 11:02 1m 12s main
November 9, 2024 11:02 1m 12s
Added pkl files
docs #59: Commit 96a8393 pushed by wulffern
November 8, 2024 22:26 1m 15s main
November 8, 2024 22:26 1m 15s
Added pkl files
gds #59: Commit 96a8393 pushed by wulffern
November 8, 2024 22:26 2m 10s main
November 8, 2024 22:26 2m 10s
Added first measurements
docs #58: Commit c52874e pushed by wulffern
November 8, 2024 22:20 1m 30s main
November 8, 2024 22:20 1m 30s
Added first measurements
gds #58: Commit c52874e pushed by wulffern
November 8, 2024 22:20 1m 33s main
November 8, 2024 22:20 1m 33s
Added note on 0 V common mode
gds #57: Commit cc1ef7e pushed by wulffern
November 5, 2024 19:02 3m 17s main
November 5, 2024 19:02 3m 17s
Added note on 0 V common mode
docs #57: Commit cc1ef7e pushed by wulffern
November 5, 2024 19:02 1m 22s main
November 5, 2024 19:02 1m 22s
updated verilog and documentation
gds #56: Commit 670e460 pushed by wulffern
July 4, 2024 18:31 3m 28s main
July 4, 2024 18:31 3m 28s
updated verilog and documentation
docs #56: Commit 670e460 pushed by wulffern
July 4, 2024 18:31 1m 13s main
July 4, 2024 18:31 1m 13s
flipped the sign of the input 0 is the positive input
gds #55: Commit d984a8f pushed by wulffern
April 18, 2024 10:37 1m 39s 1.5
1.5
April 18, 2024 10:37 1m 39s
flipped the sign of the input 0 is the positive input
docs #55: Commit d984a8f pushed by wulffern
April 18, 2024 10:37 1m 11s 1.5
1.5
April 18, 2024 10:37 1m 11s
flipped the sign of the input 0 is the positive input
docs #54: Commit d984a8f pushed by wulffern
April 18, 2024 10:26 1m 26s main
April 18, 2024 10:26 1m 26s
flipped the sign of the input 0 is the positive input
gds #54: Commit d984a8f pushed by wulffern
April 18, 2024 10:26 2m 3s main
April 18, 2024 10:26 2m 3s
Updated verilog model
gds #53: Commit 4915988 pushed by wulffern
April 18, 2024 10:19 1m 47s main
April 18, 2024 10:19 1m 47s
Updated verilog model
docs #53: Commit 4915988 pushed by wulffern
April 18, 2024 10:19 1m 21s main
April 18, 2024 10:19 1m 21s
Added reports
gds #52: Commit bac7b2a pushed by wulffern
April 14, 2024 17:01 1m 58s main
April 14, 2024 17:01 1m 58s
Added reports
docs #52: Commit bac7b2a pushed by wulffern
April 14, 2024 17:01 1m 52s main
April 14, 2024 17:01 1m 52s
Strengthened power on BSSW. BSSW power now comes from DECAP
docs #51: Commit cf6f958 pushed by wulffern
April 14, 2024 10:24 1m 45s 1.4
1.4
April 14, 2024 10:24 1m 45s
Strengthened power on BSSW. BSSW power now comes from DECAP
gds #51: Commit cf6f958 pushed by wulffern
April 14, 2024 10:24 1m 58s 1.4
1.4
April 14, 2024 10:24 1m 58s
Strengthened power on BSSW. BSSW power now comes from DECAP
docs #50: Commit cf6f958 pushed by wulffern
April 14, 2024 10:24 1m 34s main
April 14, 2024 10:24 1m 34s
Strengthened power on BSSW. BSSW power now comes from DECAP
gds #50: Commit cf6f958 pushed by wulffern
April 14, 2024 10:24 1m 45s main
April 14, 2024 10:24 1m 45s
Updated documentation. No design change
docs #49: Commit 12fc71e pushed by wulffern
April 14, 2024 09:55 1m 33s main
April 14, 2024 09:55 1m 33s
Updated documentation. No design change
gds #49: Commit 12fc71e pushed by wulffern
April 14, 2024 09:55 1m 37s main
April 14, 2024 09:55 1m 37s
Added submodules again, hopefully with right paths
docs #48: Commit 8ee5d8d pushed by wulffern
April 13, 2024 20:38 1m 15s 1.3
1.3
April 13, 2024 20:38 1m 15s