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95
...x/PKGBUILDs/linux-amlogic/0001-net-smsc95xx-Allow-mac-address-to-be-set-as-a-parame.patch
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From f05cffafeea2a0023b06622453b7dc07305c464d Mon Sep 17 00:00:00 2001 | ||
From: popcornmix <popcornmix@gmail.com> | ||
Date: Tue, 18 Feb 2014 01:43:50 -0300 | ||
Subject: [PATCH 1/5] net/smsc95xx: Allow mac address to be set as a parameter | ||
|
||
--- | ||
drivers/net/usb/smsc95xx.c | 56 ++++++++++++++++++++++++++++++++++++++ | ||
1 file changed, 56 insertions(+) | ||
|
||
diff --git a/drivers/net/usb/smsc95xx.c b/drivers/net/usb/smsc95xx.c | ||
index 06b4d290784d..3be3b5a4a176 100644 | ||
--- a/drivers/net/usb/smsc95xx.c | ||
+++ b/drivers/net/usb/smsc95xx.c | ||
@@ -60,6 +60,7 @@ | ||
#define SUSPEND_SUSPEND3 (0x08) | ||
#define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \ | ||
SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3) | ||
+#define MAC_ADDR_LEN (6) | ||
|
||
#define CARRIER_CHECK_DELAY (2 * HZ) | ||
|
||
@@ -82,6 +83,10 @@ static bool turbo_mode = true; | ||
module_param(turbo_mode, bool, 0644); | ||
MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); | ||
|
||
+static char *macaddr = ":"; | ||
+module_param(macaddr, charp, 0); | ||
+MODULE_PARM_DESC(macaddr, "MAC address"); | ||
+ | ||
static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index, | ||
u32 *data, int in_pm) | ||
{ | ||
@@ -910,8 +915,59 @@ static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) | ||
return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); | ||
} | ||
|
||
+/* Check the macaddr module parameter for a MAC address */ | ||
+static int smsc95xx_is_macaddr_param(struct usbnet *dev, u8 *dev_mac) | ||
+{ | ||
+ int i, j, got_num, num; | ||
+ u8 mtbl[MAC_ADDR_LEN]; | ||
+ | ||
+ if (macaddr[0] == ':') | ||
+ return 0; | ||
+ | ||
+ i = 0; | ||
+ j = 0; | ||
+ num = 0; | ||
+ got_num = 0; | ||
+ while (j < MAC_ADDR_LEN) { | ||
+ if (macaddr[i] && macaddr[i] != ':') { | ||
+ got_num++; | ||
+ if ('0' <= macaddr[i] && macaddr[i] <= '9') | ||
+ num = num * 16 + macaddr[i] - '0'; | ||
+ else if ('A' <= macaddr[i] && macaddr[i] <= 'F') | ||
+ num = num * 16 + 10 + macaddr[i] - 'A'; | ||
+ else if ('a' <= macaddr[i] && macaddr[i] <= 'f') | ||
+ num = num * 16 + 10 + macaddr[i] - 'a'; | ||
+ else | ||
+ break; | ||
+ i++; | ||
+ } else if (got_num == 2) { | ||
+ mtbl[j++] = (u8) num; | ||
+ num = 0; | ||
+ got_num = 0; | ||
+ i++; | ||
+ } else { | ||
+ break; | ||
+ } | ||
+ } | ||
+ | ||
+ if (j == MAC_ADDR_LEN) { | ||
+ netif_dbg(dev, ifup, dev->net, "Overriding MAC address with: " | ||
+ "%02x:%02x:%02x:%02x:%02x:%02x\n", mtbl[0], mtbl[1], mtbl[2], | ||
+ mtbl[3], mtbl[4], mtbl[5]); | ||
+ for (i = 0; i < MAC_ADDR_LEN; i++) | ||
+ dev_mac[i] = mtbl[i]; | ||
+ return 1; | ||
+ } else { | ||
+ return 0; | ||
+ } | ||
+} | ||
+ | ||
static void smsc95xx_init_mac_address(struct usbnet *dev) | ||
{ | ||
+ /* Check module parameters */ | ||
+ if (smsc95xx_is_macaddr_param(dev, dev->net->dev_addr)) | ||
+ return; | ||
+ | ||
const u8 *mac_addr; | ||
|
||
/* maybe the boot loader passed the MAC address in devicetree */ | ||
-- | ||
2.19.0 | ||
|
26 changes: 26 additions & 0 deletions
26
...inux/PKGBUILDs/linux-amlogic/0002-arm64-dts-rockchip-disable-pwm0-on-rk3399-firefly.patch
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From 73ae77ed31ba290cb09611096fd9960c4302ce9d Mon Sep 17 00:00:00 2001 | ||
From: Kevin Mihelich <kevin@archlinuxarm.org> | ||
Date: Mon, 7 Aug 2017 19:34:57 -0600 | ||
Subject: [PATCH 2/5] arm64: dts: rockchip: disable pwm0 on rk3399-firefly | ||
|
||
Workaround for intermittent boot hangs due to pwm0 probe disabling the PWM clock. | ||
--- | ||
arch/arm64/boot/dts/rockchip/rk3399-firefly.dts | 2 +- | ||
1 file changed, 1 insertion(+), 1 deletion(-) | ||
|
||
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts | ||
index 38336ab57cc4..d52e93f3e705 100644 | ||
--- a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts | ||
+++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts | ||
@@ -634,7 +634,7 @@ | ||
}; | ||
|
||
&pwm0 { | ||
- status = "okay"; | ||
+ status = "disabled"; | ||
}; | ||
|
||
&pwm2 { | ||
-- | ||
2.19.0 | ||
|
58 changes: 58 additions & 0 deletions
58
...x/PKGBUILDs/linux-amlogic/0003-arm64-dts-rockchip-add-usb3-controller-node-for-RK33.patch
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@@ -0,0 +1,58 @@ | ||
From a96dd1d8b09c809dc1f78a1c5c45fcfe5f810ede Mon Sep 17 00:00:00 2001 | ||
From: William Wu <william.wu@rock-chips.com> | ||
Date: Mon, 4 Dec 2017 10:40:39 +0100 | ||
Subject: [PATCH 3/5] arm64: dts: rockchip: add usb3 controller node for RK3328 | ||
SoCs | ||
|
||
RK3328 has one USB 3.0 OTG controller which uses DWC_USB3 | ||
core's general architecture. It can act as static xHCI host | ||
controller, static device controller, USB 3.0/2.0 OTG basing | ||
on ID of USB3.0 PHY. | ||
|
||
Signed-off-by: William Wu <william.wu@rock-chips.com> | ||
Signed-off-by: Heiko Stuebner <heiko@sntech.de> | ||
--- | ||
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 27 ++++++++++++++++++++++++ | ||
1 file changed, 27 insertions(+) | ||
|
||
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi | ||
index 3f5a2944300f..c8cd0cc6070e 100644 | ||
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi | ||
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi | ||
@@ -828,6 +828,33 @@ | ||
status = "disabled"; | ||
}; | ||
|
||
+ usbdrd3: usb@ff600000 { | ||
+ compatible = "rockchip,rk3328-dwc3", "rockchip,rk3399-dwc3"; | ||
+ clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>, | ||
+ <&cru ACLK_USB3OTG>; | ||
+ clock-names = "ref_clk", "suspend_clk", | ||
+ "bus_clk"; | ||
+ #address-cells = <2>; | ||
+ #size-cells = <2>; | ||
+ ranges; | ||
+ status = "disabled"; | ||
+ | ||
+ usbdrd_dwc3: dwc3@ff600000 { | ||
+ compatible = "snps,dwc3"; | ||
+ reg = <0x0 0xff600000 0x0 0x100000>; | ||
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; | ||
+ dr_mode = "otg"; | ||
+ phy_type = "utmi_wide"; | ||
+ snps,dis_enblslpm_quirk; | ||
+ snps,dis-u2-freeclk-exists-quirk; | ||
+ snps,dis_u2_susphy_quirk; | ||
+ snps,dis_u3_susphy_quirk; | ||
+ snps,dis-del-phy-power-chg-quirk; | ||
+ snps,dis-tx-ipgap-linecheck-quirk; | ||
+ status = "disabled"; | ||
+ }; | ||
+ }; | ||
+ | ||
gic: interrupt-controller@ff811000 { | ||
compatible = "arm,gic-400"; | ||
#interrupt-cells = <3>; | ||
-- | ||
2.19.0 | ||
|
32 changes: 32 additions & 0 deletions
32
...x/PKGBUILDs/linux-amlogic/0004-arm64-dts-rockchip-enable-usb3-nodes-on-rk3328-rock6.patch
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From bc381ddd900bac910b262bca5539030b2f5ac31b Mon Sep 17 00:00:00 2001 | ||
From: Heiko Stuebner <heiko@sntech.de> | ||
Date: Mon, 4 Dec 2017 10:40:41 +0100 | ||
Subject: [PATCH 4/5] arm64: dts: rockchip: enable usb3 nodes on rk3328-rock64 | ||
|
||
Enable the nodes to make the usb3 port usable on that board. | ||
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||
Signed-off-by: Heiko Stuebner <heiko@sntech.de> | ||
--- | ||
arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 9 +++++++++ | ||
1 file changed, 9 insertions(+) | ||
|
||
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | ||
index 5272e887a434..ad82bf39e268 100644 | ||
--- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | ||
+++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | ||
@@ -295,3 +295,12 @@ | ||
&usb_host0_ohci { | ||
status = "okay"; | ||
}; | ||
+ | ||
+&usbdrd3 { | ||
+ status = "okay"; | ||
+}; | ||
+ | ||
+&usbdrd_dwc3 { | ||
+ dr_mode = "host"; | ||
+ status = "okay"; | ||
+}; | ||
-- | ||
2.19.0 | ||
|
44 changes: 44 additions & 0 deletions
44
...hlinux/PKGBUILDs/linux-amlogic/0005-usb-dwc2-disable-power_down-on-rockchip-devices.patch
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From fa043c693efab65d3caa02cbaf93813531040eb1 Mon Sep 17 00:00:00 2001 | ||
From: Hal Emmerich <hal@halemmerich.com> | ||
Date: Thu, 19 Jul 2018 21:48:08 -0500 | ||
Subject: [PATCH 5/5] usb: dwc2: disable power_down on rockchip devices | ||
|
||
The bug would let the usb controller enter partial power down, | ||
which was formally known as hibernate, upon boot if nothing was plugged | ||
in to the port. Partial power down couldn't be exited properly, so any | ||
usb devices plugged in after boot would not be usable. | ||
|
||
Before the name change, params.hibernation was false by default, so | ||
_dwc2_hcd_suspend() would skip entering hibernation. With the | ||
rename, _dwc2_hcd_suspend() was changed to use params.power_down | ||
to decide whether or not to enter partial power down. | ||
|
||
Since params.power_down is non-zero by default, it needs to be set | ||
to 0 for rockchip devices to restore functionality. | ||
|
||
This bug was reported in the linux-usb thread: | ||
REGRESSION: usb: dwc2: USB device not seen after boot | ||
|
||
The commit that caused this regression is: | ||
6d23ee9caa6790aea047f9aca7f3c03cb8d96eb6 | ||
|
||
Signed-off-by: Hal Emmerich <hal@halemmerich.com> | ||
--- | ||
drivers/usb/dwc2/params.c | 1 + | ||
1 file changed, 1 insertion(+) | ||
|
||
diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c | ||
index bf7052e037d6..09292dc977e4 100644 | ||
--- a/drivers/usb/dwc2/params.c | ||
+++ b/drivers/usb/dwc2/params.c | ||
@@ -81,6 +81,7 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg) | ||
p->host_perio_tx_fifo_size = 256; | ||
p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << | ||
GAHBCFG_HBSTLEN_SHIFT; | ||
+ p->power_down = 0; | ||
} | ||
|
||
static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg) | ||
-- | ||
2.19.0 | ||
|
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[Trigger] | ||
Type = File | ||
Operation = Install | ||
Operation = Upgrade | ||
Target = boot/Image | ||
Target = usr/lib/initcpio/* | ||
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[Action] | ||
Description = Updating %PKGBASE% initcpios | ||
When = PostTransaction | ||
Exec = /usr/bin/mkinitcpio -p %PKGBASE% |
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